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職缺名稱公司名稱上班地點工作經驗更新薪資待遇
- 面議（經常性薪資達4萬元或以上） 高雄市新興區 工作經歷不拘 1天前更新展開
1.從事PC產品軟/韌體程式開發及問題解決、除錯、維護。 2.BIOS應用規格及流程撰寫。 3.C語言程式設計及作業系統及周邊設備控制。 4.對x86,ARM相關先進技術的軟體開發。 ※依學經歷、工作年資敘薪
- 月薪40000~60000元 高雄市新興區 工作經歷不拘 1天前更新展開
1.System Software Issue Analysis 2.BIOS and Driver Evaluation Test 3.WHQL Certification 4.Driver and Application Management. 5. New Technology Survey and Research. ※依學經歷、工作年資敘薪
- 面議（經常性薪資達4萬元或以上） 新竹市東區 2年工作經驗 1天前更新展開
1. Bus and Architecture design and RTL implementation of Smartphone chipset 2. ASIC and Smartphone SoC and mobile computing platform design. 3. System bus and mobile peripheral designs 4. SoC system performance analysis
- 面議（經常性薪資達4萬元或以上） 新竹縣竹北市 工作經歷不拘 1天前更新展開
1. 參加 IEEE 802.11 會議, 協助發展新的 wi-fi 規格並與將需求設計架構實現在聯發科 wi-fi chip 內 2. 設計 Wi-Fi Platform 與 STA 系統架構, 協助開發改善 performance, QoS 需求
- 面議（經常性薪資達4萬元或以上） 新竹市東區 5年工作經驗 1天前更新展開
1. 固定資產帳務處理及管理，年度盤點規劃 2. 各類所得扣繳申報作業 3. 會計師查帳及主管機關資料準備提供 4. 協助主管交辦事項及其他例行性事項 1. Fixed Asset Accounting, Management, and Annual Inventory Planning 2. Withholding declaration 3. Audit related tasks 4. Regular activities and other administrative tasks when required
- 面議（經常性薪資達4萬元或以上） 新竹市東區 工作經歷不拘 1天前更新展開
1) 負責設計與定義先進4G、5G及6G通訊系統內數據擷取控制系統架構，以作到系統行為分析、系統效能優化，以及問題解決。 2) 開發、優化並維護數據擷取控制系統的底層驅動程式與軟體控制流程。 3) 研究並導入以AI為基礎的自動化工具，以強化問題診斷、異常偵測與數據分析能力。
- 面議（經常性薪資達4萬元或以上） 新竹市東區 工作經歷不拘 1天前更新展開
1. 負責多媒體與周邊裝置的軟體及韌體開發（包含框架、驅動程式及功能開發）。 2. 執行客製化晶片功能驗證。 3. 進行系統效能優化及問題分析。
- 面議（經常性薪資達4萬元或以上） 台北市內湖區 3年工作經驗 1天前更新展開
1. System level SI/PI simulation. 2. Layout rule setting and review. 3. PCB stack up design. 4. Debug SI issue. *依學、經歷敘薪
- 面議（經常性薪資達4萬元或以上） 台北市內湖區 工作經歷不拘 1天前更新展開
0. 基本英文文書能力 1. Responsible for establishing and improving software engineering relevant systems and automation mechanism 2. Responsible for improving software configuration management systems 3. Responsible for improving release automation systems 4. Responsible for improving Linux build environment
- 面議（經常性薪資達4萬元或以上） 新竹市東區 2年工作經驗 1天前更新展開
At MediaTek, we are at the forefront of enabling device + cloud hybrid architectures for generative AI. On-device AI offers significant advantages, including low latency, enhanced security, privacy, and personalization through fine-tuning to meet specific user needs. As an AI SDK/IDE Software Engineer, you will be responsible for developing and enhancing our NeuroPilot SDK workflow. This role involves designing and implementing features that support neural network development stages, including network conversion, optimization tuning, profiling and accuracy analysis. You will work closely with cross-functional teams to ensure a seamless user experience and robust functionality. We are seeking talented individuals to join our team and contribute to this cutting-edge field.
- 面議（經常性薪資達4萬元或以上） 新竹縣竹北市 工作經歷不拘 1天前更新展開
我們正在招募一位熟悉生成式AI技術且擅長前端數位設計的工程師。本職缺專注於運用前沿商業或開源 LLM，於RTL設計、RTL優化、simulation testbench生成、formal testbench 生成等數位設計流程，開發提升設計自動化與效率之 AI 演算法。您將與RTL設計工程師、DV驗證工程師與AI專家合作，共同推動數位設計智能化。另外, 您也會研讀期刊,開發並評估效果, 並撰寫技術文件,專利或paper投稿.
- 面議（經常性薪資達4萬元或以上） 新竹市東區 5年工作經驗 1天前更新展開
We are looking for a highly skilled DFT CAD and Methodology Expert to develop and deploy advanced test methodologies for next-generation data center and AI ASIC. Enhancing the efficiency and quality of our ASIC development and testing procedures. The successful candidate will work within the CAD team to innovate test solutions for complex 2.5D/3DIC, ensuring high quality and yield for advanced packaging technologies. Key Responsibilities • Methodology Development: Develop and deploy robust CAD flows for scan insertion, ATPG, pattern simulation, and Memory BIST (MBIST). • Tool Automation: Create scripts (Python, TCL, Perl) to enhance and automate DFT flows, accelerating simulation runtimes and improving quality of results (QOR). • EDA Tool Integration: Collaborate with EDA vendors to enhance tools for advanced packaging, including test verification and pattern generation. • Support & Debug: Support DFT integration teams with CAD flow issues, debug complex issues, and provide technical mentorship. • 3DIC/2.5D Expertise: Develop and implement testing strategies for chiplets and TSV-based 3D stacks. • Location: Hsinchu, Taipei, Singapore.
- 面議（經常性薪資達4萬元或以上） 新竹市東區 5年工作經驗 1天前更新展開
We are looking for candidates that can communicate complex engineering subjects effectively to cross functioning technical teams and upper management. Strong DFT and leadership skills will be put to good use. Successful DFT architects interact with many external teams and must confidently represent his/her organization. Key Responsibilities • Drive DFT Excellence: Define DFT architecture specifications that enhance ATE and production test environments, optimize test costs, and improve quality across future MTK ASIC product portfolios. • End-to-End DFT Leadership: Manage comprehensive DFT activities spanning architecture definition, design implementation, verification, and test deployment for new product launches • Manufacturing Integration: Serve as a key contributor within MTK’s Global Quality and Operations organization to deliver optimal manufacturing test solutions from early product conception through post-silicon validation • Design Collaboration & Quality Assurance: Partner closely with design teams to ensure accurate implementation of DFT structures and compliance with specifications • Cross-Functional Team Coordination: Lead internal DFT teams in developing and implementing robust test solutions aligned with architectural requirements • Yield Optimization Strategy: Develop comprehensive plans for diagnosability enhancement and systematic yield improvement • Location: Hsinchu, Taipei, Singapore, USA
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