- 面議（經常性薪資達4萬元或以上） 新竹縣寶山鄉 工作經歷不拘 41天前更新展開
【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=16565&source=1111&tags=AO+2026_1111 Description : R&D Engineers will be part of a grand joint-force working on advanced technologies, including but not limited to exploratory research in advanced device architecture, market-oriented design IP enablement, device and process integration for manufacturability, package-level interconnect solutions, and novel material/equipment/process evaluations. Responsibilities: 1. Research & Pathfinding (1) New material and new process pathfinding to enable new device architecture with integration. (2) New tool pathfinding for new materials to enable the next nodes. (3) Design, execute and analyze experiments to meet R&D engineering specifications. (4) Process stability & manufacturability improvement for yield and reliability qualification. (5) Process/tool transfer to development R&D or volume manufacturing (Fab). (6) Highly motivated individuals with a strong technical background and teamwork skills. 2. Integration (1) Technology definition: design rules, design-technology co-optimization, logic/memory IP evaluations, etc. (2) Technology development infrastructure: productivity enhancement, product inspection methodology, mask-making, and test flow, etc. (3) New test vehicle establishment and validation: improvement of device yield and reliability (learning cycles). Improve yield and reduce defects by quantifying defect attributes using programming skills and developing effective detection methodologies. (4) Customer design enablement: SPICE Modeling and IP qualifications. 3. Module (1) Develop advanced processes, materials, tools, models, and computational methodologies for leading edge technologies. (2) Deliver manufacturable, stable, cost-effective technologies with device performance improvement for yield and reliability qualification. (3) Transfer process and tool to high volume manufacturing fab. 4. R&D Process Center (1) PE: Advanced module process development and baseline sustaining. (2) EE: Handle advanced equipment at R&D stage. Install, warm up, sustain and troubleshooting solve with new technology equipment. (3) MFG: Oversee the daily operations of IC foundry to ensure that all profiling operations, workflow, and customer reports are consistent with agreed upon service operations.
- 面議（經常性薪資達4萬元或以上） 新竹縣寶山鄉 工作經歷不拘 41天前更新展開
【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=16566&source=1111&tags=AO+2026_1111 Description : At the beginning of new module research, IC design engineers and R&D engineers would closely cooperate with customers. Once the new module technologies are developed, we could accomplish the goal of massive production and have customers’ new product launch in a short time. At TSMC, you will have the opportunity to work with the most advanced module technologies, provide solutions to partners in the global IC design ecosystem, and ensure competitiveness in power, performance, and area. Responsibilities: 1. Physical Designer The principal responsibility of the candidate is to perform complete netlist to GDS physical design steps which include floor plan, PNR, timing closure, IR/EM analysis, layout verification, formal verification, and other tape out related tasks. The candidate will work in a talented team to design advanced chips using cutting-edge process nodes while meeting high standard design requirements. 2. Standard Cell Engineer (1) Pathfinding of library characterization for leading edge tech nodes. (2) Support industrial standard library kits generation and QC. (3) In-house library generation flow and/or utility development. (4) RC parasitic extraction analysis and APR related analysis. 3. Layout Engineer (1) IC layout for advanced technology (Std. cell/Memory/AMS/IO). (2) Layout structure development for new technology. (3) Pathfinding for new technology development. (4) Customer engagement and layout support. (5) Design and technology co-optimization (DTCO). (6) AI and automation for layout and physical design. 4. System and Chip Design Solutions Development Please refer to the Link: https://careers.tsmc.com/zh_TW/careers/JobDetail?jobId=516 5. FE design & DFT (1) Test chips development for advanced nodes, including physical design (APR), logic synthesis and DFT (Scan insertion + ATPG). (2) Design flow development for test chips design, which requires the programming skills, Tcl, Python, C-shell scripting etc. (3) Technology benchmarking for PPA evaluation of the advanced nodes. (4) DTCO (Design & Technology Co-Optimization) pathfinding and development. 6. SRAM Engineer (1) SRAM design in advanced nodes for mobile, high-performance computing, IoT, automotive applications. (2) RRAM/MRAM, emerging memory development. (3) In memory computing research and development. 7. Design Flow/Methodology (1) Advanced technology process design kits (PDK) and tech files (DRC, LVS, RC, etc.) development and technical support. (2) Advanced technology design development flow development and technical support. (3) Automation program development to support design kits and flow development productivity/quality.
- 面議（經常性薪資達4萬元或以上） 新竹縣寶山鄉 工作經歷不拘 41天前更新展開
【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=16567&source=1111&tags=AO+2026_1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. In 2023, the company served 528 customers with 11,895 products for high performance computing, smartphones, IoT, automotive, and consumer electronics, and is the world’s largest provider of logic ICs with annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and its ESMC subsidiary plans to begin construction on a fab in Germany in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Responsibilities: 1. Novel devices developing for specialty technology. 2. Device Simulation, Test-chip design tape out and measurement system developing. 3. Process flow developing for production. 4. Collaborate with related teams for Design Collaterals (DRM/DRC/LVS/SPICE/PDK) developing.
- 面議（經常性薪資達4萬元或以上） 新竹縣寶山鄉 工作經歷不拘 41天前更新展開
【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=16568&source=1111&tags=AO+2026_1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. In 2023, the company served 528 customers with 11,895 products for high performance computing, smartphones, IoT, automotive, and consumer electronics, and is the world’s largest provider of logic ICs with annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and its ESMC subsidiary plans to begin construction on a fab in Germany in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Responsibilities: As a member of the IIP (Integrated Interconnect & Packaging) team, you will initiate novel package concepts, own and drive advanced package development, new product package structure and configuration optimization. You will be responsible for 3DFabric technology research and development. Including InFO, CoWoS, Coupe and SoIC process/integration development for customer‘s variety applications. 1. Integration (1) Develop advanced 3DIC (InFO, CoWoS, Coupe and SoIC) process and sustain baseline. (2) Package level reliability, failure mode analysis and improvement plan. (3) Customer technical interface, new tape out and lot handle. (4) Handover developed technologies to manufacturing groups for production. 2. Module Development (1) Be responsible for CVD/PVD/CMP/Lithography/Etch/Polymer/Bonding/Clean module development for 3DIC projects. (2) New technology, materials survey, and process improvement on 3DIC package structures. (3) Process development and tool transfer to mass-production development. 3. Simulation (1) Conduct risk assessment and provide mitigation plan for IC packages by simulation and experiment. (2) Practice FEM and DOE in problem solving and path finding particularly on packaging. (3) Continue improvement in simulation methodology, material modeling and script automation.
- 面議（經常性薪資達4萬元或以上） 新竹縣寶山鄉 工作經歷不拘 41天前更新展開
【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=16570&source=1111&tags=AO+2026_1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. In 2023, the company served 528 customers with 11,895 products for high performance computing, smartphones, IoT, automotive, and consumer electronics, and is the world’s largest provider of logic ICs with annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and its ESMC subsidiary plans to begin construction on a fab in Germany in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Responsibilities: 我們確保晶片的品質、持續提升良率，提供給客戶具有競爭力且高品質的晶片，讓電子產品不但先進且效能穩定；製程整合工程師為半導體製造中的重要協調者，需要與客戶溝通了解客製化的晶片應用需求，再將訊息帶回廠內，與各工程單位合作。良率精進工程師監控晶片的良率與缺陷，使用量測機台監測晶片的缺陷，找出可能的問題，再與製程解決問題。 1. A highly motivated individuals with a strong technical background and capabilities to develop and sustain process technologies for logic, flash memory, and specialty products. 2. Working with a team which may include device, integration, yield, lithography, etch and thin films or external suppliers to drive leading-edge integrated module development, control and improvements. 3. Be responsible for sustaining ownership such as day-to-day operations, equipment troubleshooting and mentoring technicians.
- 面議（經常性薪資達4萬元或以上） 新竹縣寶山鄉 工作經歷不拘 41天前更新展開
【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=16571&source=1111&tags=AO+2026_1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. In 2023, the company served 528 customers with 11,895 products for high performance computing, smartphones, IoT, automotive, and consumer electronics, and is the world’s largest provider of logic ICs with annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and its ESMC subsidiary plans to begin construction on a fab in Germany in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Responsibilities: 我們在第一線負責晶片製造過程，改善機台製程參數的設定，提升良率並讓機台每單位時間產出增加，也降低生產成本；半導體製程可大致分為四大模組，大致流程順序為薄膜沈積、黃光微影製程、溼式與乾式蝕刻、熱製程與離子摻雜(擴散)。 1. To be responsible to drive leading edge process/device/advanced packaging development and optimization of CMOS/Flash/Specialty devices in order to meet scaling, performance, reliability, and manufacturability requirements. 2. Identify and solve IC process and device problems.
- 面議（經常性薪資達4萬元或以上） 新竹縣寶山鄉 工作經歷不拘 41天前更新展開
【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=16572&source=1111&tags=AO+2026_1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. In 2023, the company served 528 customers with 11,895 products for high performance computing, smartphones, IoT, automotive, and consumer electronics, and is the world’s largest provider of logic ICs with annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and its ESMC subsidiary plans to begin construction on a fab in Germany in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Responsibilities: 機台是工廠穩定運作的基礎，我們在生產線上，負責高端精密、高單價半導體設備的維護、保養並判斷、解決機台發生的問題；如此可減少機台當機的時間與提升機台可運轉的時間，進而降低生產成本並提升公司的獲利能力。 1. Master Nano Diffusion, Thin Film, Lithography, Etching, or Metrology equipment. 2. Sustain and troubleshoot issues with high-tech equipment. 3. Improve and enhance the efficiency and productivity of equipment. 4. Plan and execute the analysis or defect detection projects. 5. Communicate with cross-functional engineers or vendors.
- 月薪30500~35600元 桃園市中壢區 工作經歷不拘 5天前更新展開
1.商品陳列、補貨上架。 2.倉庫整理、賣場環境維護。 3.提供顧客之接待與需求服務。 4.POS系統操作，顧客收銀結帳。 5.協助同事工作，完成主管交辦事項。
意外險員工團保伙食津貼員工聚餐員工結婚補助 - 面議（經常性薪資達4萬元或以上） 新竹縣寶山鄉 工作經歷不拘 41天前更新展開
【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=16573&source=1111&tags=AO+2026_1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. In 2023, the company served 528 customers with 11,895 products for high performance computing, smartphones, IoT, automotive, and consumer electronics, and is the world’s largest provider of logic ICs with annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and its ESMC subsidiary plans to begin construction on a fab in Germany in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. 智慧製造工程師為創造晶圓產出最大化，滿足客戶交期，為公司帶來營收；身為工廠的第一線管理者，需掌握生產流程，藉由良好且精準派工提升機台生產效率，帶領技術員團隊確保製造流程順暢運行並達成每日的產能目標。 As a global semiconductor technology leader, TSMC is seeking an Intelligent Manufacturing Engineer to join our team. Our commitment to driving manufacturing excellence has led us to integrate artificial intelligence, machine learning, expert systems, and advanced algorithms to build up an intelligent manufacturing environment. Join TSMC, we are the most advanced technology team and connect with the world, as we head towards an unlimited future. We look forward to you joining us! You will be assigned to one of the following five roles according to your interest, experiences, and technical background. Responsibilities: 1. MFG Intelligent Manufacturing Engineer 2. CIM Intelligent Manufacturing Engineer 3. Data Analyst & Data Scientist 4. AMHS (Automated Material Handling System) Engineer 5. PIDS/WAT (Wafer Acceptance Test) Engineer 6. PIDS/NTO (New TapeOut) Engineer 7. Quality Management Engineer
- 面議（經常性薪資達4萬元或以上） 新竹縣寶山鄉 工作經歷不拘 41天前更新展開
【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=16574&source=1111&tags=AO+2026_1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. In 2023, the company served 528 customers with 11,895 products for high performance computing, smartphones, IoT, automotive, and consumer electronics, and is the world’s largest provider of logic ICs with annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and its ESMC subsidiary plans to begin construction on a fab in Germany in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Responsibilities: 廠務工程師為整合各項廠區資源，提供晶圓生產所需之電力、水、氣體、化學品、空調等，為台積高度智慧自動的生產單位，供應最高品質、最穩定的生產作業環境。近年廠務工程師更肩負環境保護與永續的責任，如何精進節水、節能、減碳、環保的廠務運轉技術，更是廠務工程師可以發揮專業與創意的主舞台。 1. Responsible for the planning, constructing, operating, and maintaining semiconductor plant facility systems, including risk analysis of facility system operations and supply quality, allocating resources and energy, managing construction safety. 2. Provide a stable facility system, including power, water, gas, chemicals and HVAC, to meet wafer production requirements. 3. Collaborate with other departments to ensure that the facility system is operating at the highest level of quality when on duty. 4. Construction management & project coordination.
- 面議（經常性薪資達4萬元或以上） 新竹縣寶山鄉 工作經歷不拘 41天前更新展開
【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=16575&source=1111&tags=AO+2026_1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. In 2023, the company served 528 customers with 11,895 products for high performance computing, smartphones, IoT, automotive, and consumer electronics, and is the world’s largest provider of logic ICs with annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and its ESMC subsidiary plans to begin construction on a fab in Germany in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Responsibilities: 加入台積電，成為產品工程師，你將有機會參與世界級先進製程技術，與頂尖團隊合作，挑戰技術極限！你將負責協助產品導入量產、提升良率，並確保產品符合客戶的最高標準。在這裡，你將學習到最先進的半導體技術，並為推動科技發展貢獻力量。我們的專業涵蓋非常廣，從成熟廠到先進廠、從邏輯產品到特殊應用甚至到封裝測試，能夠對產品有全面的了解與完整分析的能力。 1. Leading edge product development. Learn the most advanced technology in semiconductor manufacturing, identify effective process solution for yield and chip performance improvement. 2. Involving cross-team work for joint project development. Coordinate with customer/Fab/different support team closely to address improvement opportunities and work-out the solution. 3. Expanding wider vision with learning device engineering, manufacturing process, yield / WAT analysis, design rule, wafer CP test knowledge, by using comprehensive analysis skills to solve product issue. 4. Developing HV, embedded memory, RF, MEMS, and CIS products falls under the category of 〝More than Moore〝. In this role, you will collaborate with R&D and customers to develop new applications using mature Si process technology.
- 面議（經常性薪資達4萬元或以上） 新竹縣寶山鄉 工作經歷不拘 41天前更新展開
【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=16576&source=1111&tags=AO+2026_1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. In 2023, the company served 528 customers with 11,895 products for high performance computing, smartphones, IoT, automotive, and consumer electronics, and is the world’s largest provider of logic ICs with annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and its ESMC subsidiary plans to begin construction on a fab in Germany in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Responsibilities: TSMC‘s advanced packaging process is an efficient and high-density packaging technology that mainly targets the demand for high-performance semiconductor components, including microprocessors, graphics processors, artificial intelligence chips, etc. This technology uses advanced 3D stacking technology to vertically stack multiple chips and uses high-density packaging materials to fix them together. This technology can improve the performance of components, reduce power consumption, reduce package size, and increase system integration. TSMC‘s packaging process includes various technologies such as CoWoS, InFO. Among them, CoWoS is a technology that connects different chips through copper wires through silicon interconnect technology to achieve high-frequency and high-speed data transmission. InFO technology directly encapsulates chips on the substrate, connecting chips and substrates through tiny copper wires, achieving a more compact and efficient packaging solution. TSMC‘s advanced packaging process can improve chip performance and production efficiency, and meet the packaging technology requirements of modern high-performance electronic products, such as smartphones, artificial intelligence, high-performance computing, and other fields. TSMC‘s advanced packaging organization include Testing R&D Engineer conduct exploratory research in DFT test architecture, evaluate next-gen test technology of several device (logic SOC, HPC, AP, RF, etc.),which used 3D silicon stacking and advanced packaging technologies and closely teamwork with international customer from new product introduction to mass production.
- 面議（經常性薪資達4萬元或以上） 新竹縣寶山鄉 工作經歷不拘 41天前更新展開
【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=16577&source=1111&tags=AO+2026_1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. In 2023, the company served 528 customers with 11,895 products for high performance computing, smartphones, IoT, automotive, and consumer electronics, and is the world’s largest provider of logic ICs with annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and its ESMC subsidiary plans to begin construction on a fab in Germany in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Responsibilities: 品質與可靠性工程師：為守護客戶產品不受任何缺陷影響，建立優良的產品品質與可靠度，以協助客戶在市場上搶得先機、強化競爭力；QR致力於開發領先全球的電子、物理、材料與化學等科學分析專業及可靠度統計量測方法，應用於我們的產線，確保從晶片設計、製程開發、產品量產到封裝測試等階段的品質及可靠度問題皆有完整的解決方案，同時提供最先進的材料與故障分析等服務，成為公司各組織、客戶以及供應商最信任的合作夥伴。 1. Quality and Reliability roles. 2. Failure & TEM analysis, Reliability data analysis, manufacturing production quality management and reliability assessment, research, and development of new analysis protocol. 3. Customers problem resolving for production quality / reliability issues.
- 月薪33000~43000元 新北市三重區 3年工作經驗 7天前更新展開
工作內容 1. 負責行銷策略的規劃、執行和追蹤，包括線上和線下的活動。 2. 需要具備市場分析、活動企劃、文案撰寫、數據分析等能力。 3. 主要負責線上行銷，如網站經營、SEO優化、社群媒體行銷、廣告投放等。 4. 需要熟悉各種數位工具和平台，並具備數據分析能力 5. 負責社群媒體平台的經營，包括內容發布、互動、活動策劃等。 6. 需要具備良好的文字表達能力、創意發想能力，並熟悉社群平台特性。 滿試用期後另有獎金 : 1.每季業績獎金 2.年度績效獎金 3.年終獎金
就業保險產檢假安胎假家庭照顧假產假 -
