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職缺名稱公司名稱上班地點工作經驗更新薪資待遇
- 面議（經常性薪資達4萬元或以上） 新竹市東區 工作經歷不拘 3天前更新展開
1. 高速Serdes系統技術開發(200Gbps+), 包括電通訊與光通訊(optical interconnect) 2. 定義系統技術規格並與設計團隊(Analog, Digital, Algorithm)討論系統架構, 建立模型模擬評估 3. Serdes 關鍵技術評估與開發( e.g., Next Gen Serdes, optical nonlinearity compensation, CPO technology) 4. 協助Serdes IP驗證問題分析
- 面議（經常性薪資達4萬元或以上） 新竹市東區 6年工作經驗 3天前更新展開
1. 應用於I/O 小晶片的 SerDes 設計驗證工作. 包含從原型測試到量產晶片, 並與類比, 數位和演算法設計團隊合作. 2. 負責實現 SerDes 韌體設計, 以驗證連線效能和實現量產測試 3. 負責建立自動測試和資料分析, 以測試SerDes的晶片特性和分析失效晶片
- 面議（經常性薪資達4萬元或以上） 新竹縣竹北市 2年工作經驗 3天前更新展開
1. 負責高速 Serdes相關開發, 包含驗證, 客戶支援 (熟悉架構, 韌體、除錯、優化及測試等工作項目) 2. 開發測試自動化 3. 協同團隊共同完成系統雛型建立及性能優化與調適 4. 達成客戶端產品導入，並支援產品量產
- 月薪32000元 台中市潭子區 工作經歷不拘 3天前更新展開
1.履歷表篩選、面試邀約/安排/回覆及各項招募過程的溝通協調 2.出勤管理作業 3.相關報表處理 4.其他人事行政作業及主管交辦事項 5.具備制度規章修訂經驗者佳 6.具備人力資源相關知識、熟悉勞動法規尤佳
員工生日禮金年終獎金員工團保員工餐廳國內旅遊 - 面議（經常性薪資達4萬元或以上） 新竹市東區 8年工作經驗 3天前更新展開
We are looking for a highly experienced PISI Technical Leader to join our team. The ideal candidate will have extensive experience in Power Integrity and Signal Integrity, with a strong background in high-speed IO interface simulations and PDN analysis. As a PISI Technical Leader, you will guide customers through Signal Integrity and Power Integrity signoff, model and optimize system components, and collaborate with various teams to ensure optimal package, PCB, die, interposer, and substrate designs. 1. Guide customers to complete Signal Integrity and Power Integrity signoff. 2. Model and optimize vias, connectors, sockets, breakouts, and various system components using commercial tools. 3. Perform system-level signal integrity simulation in high-speed IOs such as PCIe, SerDes 4. Architect and simulate power delivery systems, including multiple dies, substrate, interposer, PCBs, and on-die PDN models. 5. Collaborate with multiple teams, including layout, design, and customers, to optimize package, PCB, die, interposer, and substrate designs.
- 月薪38000元 桃園市中壢區 1年工作經驗 3天前更新展開
1.現場安全衛生管理 2.工地安全衛生巡檢與稽核 3.工安報表文書作業 4.其他安全衛生管理及交辦事項 ※ 具經驗者，薪資另議 ★依法晉用原住民,歡迎所有求職者.原住民加入我們的團隊★
國內、外旅遊補助社團補助員工在職教育訓練就業保險產假 - 面議（經常性薪資達4萬元或以上） 新竹市東區 6年工作經驗 3天前更新展開
The Senior Power Integrity Engineer is responsible for the design and analysis of Power Delivery Networks (PDNs), encompassing voltage regulators, PCBs, substrates, and silicon dies, to drive strategic technology development for data center SoCs. Key responsibilities include conducting power integrity pathfinding, developing both detailed and reduced-order PDN models, and optimizing PDN performance through comprehensive time-domain and frequency-domain analysis. This role requires proficiency in scripting and design automation, as well as expertise in analytical methods and commercial simulation tools (e.g., 2.5D EM solvers) to extract PCB and package impedance profiles and generate accurate N-port models.
- 面議（經常性薪資達4萬元或以上） 新竹市東區 工作經歷不拘 3天前更新展開
• Design, simulate and test various building blocks for photonic ICs such as modulators, filters, and detectors. • Develop mathematical models of photonic components for co-simulation with electronic circuits. • Contribute to the integration and testing of Photonic & Electronic ICs, collaborate with cross functional teams to improve system performance and optimize designs. • Must be proficient in programming (e.g. Python or MATLAB) for design automation
- 面議（經常性薪資達4萬元或以上） 新竹市東區 8年工作經驗 3天前更新展開
The Senior Manufacturing and Test Engineer is responsible for improving manufacturing and test flows to optimize quality, yield and power in AI ASICs. Activities include DFT definition, coverage analysis and test content improvements at socket & system level to drive yield and quality. Collaboration across design and manufacturing teams to correlate pre-silicon to post-silicon through data analysis, building quality models and driving optimizations is expected. Deep understanding and experience in DFT architecture, quality, yield and power measurement flows is needed.
- 面議（經常性薪資達4萬元或以上） 新竹市東區 3年工作經驗 3天前更新展開
1.PCB power related hardware design：Resonsible for design and develop hardware including circuit design, component evaluation and selection, customized component planning, layout review, etc. 2. System specification and design requirement collection. 3. System hardware verification and testing: function verification and power quality measurement. 4. Cross-organizational collaboration: Collaborate with IC design team, system team, SI/PI team, layout team, etc. to complete system design, production and verification. 5. Customer and related manufacturer support: including technical document writing, customer reference design support, on site support, etc.
- 面議（經常性薪資達4萬元或以上） 新竹市東區 2年工作經驗 3天前更新展開
1. Develop Playbook for ASIC design 2. Monitor the project execution based on the Playbook 3. Coordinate among different teams to improve Playbook
- 面議（經常性薪資達4萬元或以上） 新竹市東區 6年工作經驗 3天前更新展開
1. 整合IR 資訊和內部團隊合作解決 IR 問題 2. 產生並分析 power 資訊 3. 和客戶溝通 IR 相關的 methodology 並開發流程解決問題
- 面議（經常性薪資達4萬元或以上） 新竹市東區 2年工作經驗 3天前更新展開
1. Develop and implement DRAM controller/PHY solutions for data-center applications. Validate functionality, improve design to optimize performance, power, latency and efficiency. 2. Memory controller/PHY Integration: Design and integration memory system.
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