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職缺名稱公司名稱上班地點工作經驗更新薪資待遇
- 面議（經常性薪資達4萬元或以上） 新竹市東區 工作經歷不拘 119天前更新展開
1. 規劃NPU量產測試程式 2. 測試及驗證IC功能、性能以及功耗的分析改進 3. 分析測試資料及測試相關問題，並分析良率問題並改善 4. AVS low power 的設計
- 面議（經常性薪資達4萬元或以上） 新竹市東區 7年工作經驗 119天前更新展開
1. Supplier Management: Manage key substrate suppliers and conduct rigorous QCDST evaluations to ensure alignment with MediaTek‘s standards. 2. Capacity & Supply Planning: Monitor substrate market dynamics (focusing on ABF) to secure long-term capacity reservations and strategic allocations. 3. Risk Mitigation: Track upstream raw materials (e.g., CCL, T-glass fiber) and cultivate 360-degree relationships with key vendors to prevent supply disruptions. 4. Cost Optimization: Drive cost-reduction targets through in-depth cost structure analysis, process optimization, and quarterly/annual price negotiations. 5. NPI & Technology Alignment: Partner with Package Design and R&D during the NPI phase to evaluate supplier technology roadmaps and mass-production feasibility. 6. Cross-functional Issue Resolution: Collaborate internally to expedite solutions for material shortages, quality excursions, and urgent order modifications. 1. 供應商管理： 管理主要的基板供應商，並進行嚴格的 QCDST（品質、成本、交期、服務、技術）評估，以確保其符合聯發科的標準。 2. 產能與供應規劃： 監控基板市場動態（特別是ABF基板），以確保長期產能預留以及策略性分配。 3. 風險控管： 追蹤上游原材料（如CCL、T玻纖），並與主要供應商建立全方位的夥伴關係，以預防供應中斷。 4. 成本優化： 透過深入的成本結構分析、流程優化，以及季度／年度價格談判，推動達成成本降低目標。 5. 新品導入與技術協同： 在新品導入（NPI）階段，與封裝設計及研發部門合作，評估供應商的技術藍圖與量產可行性。 6. 跨部門問題解決： 內部協作，快速解決原物料短缺、品質異常與緊急訂單變更等問題。
- 面議（經常性薪資達4萬元或以上） 新竹市東區 4年工作經驗 119天前更新展開
* 根據積體電路設計流程、半導體器件、良率提升等相關知識進行數據分析 * 建立人工智慧框架與工作流程，以提升數據運營與分析的生產力 * 與不同的內部及外部團隊溝通協作，提出策略建議
- 面議（經常性薪資達4萬元或以上） 新竹市東區 4年工作經驗 119天前更新展開
1. 參與CPU IP電路設計弱點之檢視與審查。 2. 開發 CPU IP 電路穩定度之測試項目，以排查/篩選出電路弱點。 3. 制定 CPU 電源完整性與電源量產品質方法
- 面議（經常性薪資達4萬元或以上） 新竹市東區 5年工作經驗 119天前更新展開
根據不同專案使用的各種CPU架構: * Function validation * Margin characterization & validation * System stability validation * Power/VF/Benchmark characterization * Customer issue resolve
- 面議（經常性薪資達4萬元或以上） 新竹市東區 2年工作經驗 119天前更新展開
1. AI processor subsystem架構與RTL設計 2. AI processor subsystem整合驗證與介面設計 3. AI processor subsystem效能與低功耗設計與分析
- 面議（經常性薪資達4萬元或以上） 新竹市東區 6年工作經驗 119天前更新展開
1. 2.5D/3.5D package technology development 2. SoC/Memory heterogeneous integration package development 3. Package technology integration, NPI and MP 4. Project management
- 面議（經常性薪資達4萬元或以上） 新竹市東區 8年工作經驗 89天前更新展開
1. Contribute to the development and enhancement of design methodologies for 2.5D and 3D IC advanced package design. 2. Lead the development of new design and signoff flows for physical, electrical, and thermal quality assurance. 3. Support package design teams in defining a tool roadmap for advanced package design. 4. Contribute to interposer designs, advanced package designs, and test vehicles for the product design roadmap and feasibility. 5. Represent the Package design team in customer engagements for advanced package designs.
- 面議（經常性薪資達4萬元或以上） 新竹市東區 8年工作經驗 119天前更新展開
- Lead and manage RFI/RFQ/SOW processes and negotiate commercial terms with AI data center clients, ensuring timely and accurate responses. - Collaborate closely with engineering, sales, and marketing teams to deliver data center ASIC solutions tailored for AI workloads. - Develop compelling product positioning and messaging for both internal and external stakeholders. - Work with field teams to assess competitive landscape and maintain market intelligence. - Support business development activities to the sales team to foster strong customer relationships. - Drive cross-functional teams to align on product specifications, timelines, and deliverables. - Prepare and present detailed product proposals and reports to executive leadership and customers. - PLM (Product Lifecycle Management), manage program from kickoff, execution, NPI all the way to volume production
- 面議（經常性薪資達4萬元或以上） 新竹市東區 工作經歷不拘 119天前更新展開
Co-work with algorithm, digital/analog design, firmware, AI tool teams. 0+ ~ 10+ Years Experience in: Agentic AI Workflow/Tool Evaluation/Deployment Data Center & High-Speed SerDes Design Verification Plan & Project Execution Automotive Design Verification Plan & Project Execution 5G/6G Wireless Communication Design Verification Plan & Project Execution Satellite/NTN Communication Design Verification Plan & Project Execution Processor Platform/Peripherals Design Verification Plan & Project Execution Subsystem / System Level Design Verification Plan & Project Execution
- 面議（經常性薪資達4萬元或以上） 新竹市東區 工作經歷不拘 119天前更新展開
1. High Speed digital design implementation 2. Integration from RTL to gate level, including flow QC, timing closure and issue analysis & solving 3. Signoff on design with mixed-signal interface 4. Design methodology and integration flow improvement
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