- 時薪190~200元 新北市新店區 工作經歷不拘 5天前更新展開
1. 通訊產品介紹與銷售，協助客戶挑選適合的設備。 2. 中華電信相關業務辦理，協助客戶選擇最適資費方案。 3. 新夥伴會有完整教育訓練，歡迎無經驗有服務熱忱的你。 4. 處理各項店務作業，如收銀結帳、庫存盤點、門市清潔，讓你更了解門市運營模式。 5. 上班地點離家近，上班不用人擠人。 6. 工作氣氛好，跟可愛的門市夥伴一起打拚。 **偶爾需配合店點輪調** 神腦國際有完善的公司制度與新人教育訓練 歡迎喜愛與人互動且熱愛銷售的你一同加入我們！
產假產檢假安胎假家庭照顧假全勤獎金 - 面議（經常性薪資達4萬元或以上） 新竹市東區 2年工作經驗 9天前更新展開
1. 系統應用電源需求與控制架構分析 2. 電源管理晶片規格制定與驗證 3. 類比電路開發與驗證 4. 驗證電路板設計 5. 自動化測試開發
- 面議（經常性薪資達4萬元或以上） 新竹市東區 2年工作經驗 9天前更新展開
• Chip to Chip 介面類比 PHY 電路，例如 UCIe 標準或客製化的 Die to Die 連結類比電路設計 • HBM/DDR/LPDDR類比PHY電路設計與混合模式/高速電路設計等。
- 面議（經常性薪資達4萬元或以上） 新竹市東區 4年工作經驗 9天前更新展開
1. DFT architecture exploration & evaluation for next-gen process node & package technology of MediaTek: * Scan chain insertion & ATPG pattern generation * Pattern validation through simulation & silicon analysis(pass/fail, shmoo, fail log, etc.) * Diagnosis to help manufacture process improvement 2. Co-work with SoC architect, RTL designer, physical design engineer, and package engineer to define best architecture for 3D-IC: * PPA(Performance/Power/Area) impact analysis & mitigation via DFT innovation * Develop & integrate DFT-related RTL design modules to test chip
- 月薪32000~38000元 新北市新店區 工作經歷不拘 5天前更新展開
1.商品採購流程處理 2.商品價格上傳、下架、退貨帳務作業處理 3.商品物流費月報及扣款作業報表製作 4.廠商月結報表統計及付款明細提供 5.帳務管理、月結報表之核對與扣款及進貨成本管控 6.異常作業處理及其他主管交辦事項
產假產檢假安胎假家庭照顧假全勤獎金 - 面議（經常性薪資達4萬元或以上） 新竹市東區 2年工作經驗 9天前更新展開
• Work with the architecture/micro-architecture/design teams to do white box testing. • Create testplans based on the micro-architecture document with the design team. • Build, maintain and upgrade testbenches and their components using UVM-based methods. • Build custom BFMs for co-sim based module level verification. • Add assertions and checkers to facilitate verification. • Work with the design team to do module level formal verification. • Create controlled random testcases. Pre-debug and provide debug reports. • Check functional coverage and code coverage.
- 面議（經常性薪資達4萬元或以上） 新竹市東區 10年工作經驗 9天前更新展開
• Lead the DV effort of a high-end CPU project. • Manage, coach and guide DV engineers. Follow up status and keep up the schedule. • Architect and implement top-module testbenches and their components using UVM-based methods. • Lead the effort of building in-house BFMs to facilitate co-sim based module level verification. • Architect and implement formal verification based module level testbench. • Work with the design team to create testplans. Implement checkers/assertions/coverage check points. • Work with validation folks to improve design visibility
- 面議（經常性薪資達4萬元或以上） 新竹市東區 2年工作經驗 9天前更新展開
• Work with the architecture team in the early stage of the project to derive various architecture and micro-architecture proposals. • Work with the performance architect to create performance models for various functional blocks of a microprocessor, memory subsystem and the whole core. • Work with design teams to analyze performance corner cases and provide feedback to the architecture team.
- 面議（經常性薪資達4萬元或以上） 新竹市東區 10年工作經驗 9天前更新展開
Work in Analog/Mixed-Signal Modeling and Verification Methodology Development group to establish, streamline and enhance new and existing AMS Behavioral Modeling related development method, coding and validation process and integration flows, and work hands-on with AMS IP Teams for AMS Behavioral Modeling flow and process experiments, demonstrations, adaptions, and deployment. The candidate will work with AMS IP teams including digital design, analog design, analog behavioral modeling and design verification members, apply and advance existing and evolving AMS Behavioral Modeling methodologies and processes, and contribute to establish and maintain Modeling Platform to ensure High Quality and High Efficiency of Pre-Si AMS Modeling, Validation and Verification delivery towards high quality silicon products. • Work in methodology development group to establish, streamline and enhance new and existing AMS Behavioral Modeling related development method, coding and validation process and integration flows. • Work with teams to enable deployment of new AMS Behavioral Modeling flow and processes through experiments, demonstrations, adaptions (for real projects in specified areas such as RF, etc) and integration. • Document on new flows and processes for AMS Behavioral Modeling. • Apply wide range of AMS Behavioral Modeling skills to help and support AMS IP or Chip Teams to establish or enhance new or existing Modeling capabilities, including but not limited to Model Development, Model Validation to ensure Consistency of Behavior with Original Circuit, Integration of Models into various Verification Environment, fixing Modeling issues found in simulation, etc. • Contribute to continuous improving on AMS Behavioral Modeling process for better quality and efficiency through methodology and process improvements. • Communicate and collaborate with global architecture, design, verification teams to address new needs or requirement on AMS Behavioral Modeling. Job Locations: • Taiwan:Hsinchu/Taipei • India: Bangalore • Singapore • USA:Santa Clara, CA/San Diego, CA
- 面議（經常性薪資達4萬元或以上） 新竹市東區 10年工作經驗 9天前更新展開
Work in Analog/Mixed-Signal Design Verification Methodology Development group to establish, streamline and enhance new and existing AMS DV related development method, coding process and integration flows, and work hands-on with AMS IP Teams for AMS DV flow and process experiments, demonstrations, adaptions, and deployment. The candidate will work with digital design, analog design, analog behavioral modeling and design verification teams, apply and advance existing and evolving Digital and AMS Verification methodologies and processes, and contribute to establish and maintain Verification Platform to ensure High Quality and High Efficiency of Pre-Si Verification Delivery towards high quality silicon products. • Work in methodology development team to establish, streamline and enhance new and existing AMS DV related development method, coding process and integration flows. • Work with teams to enable deployment of new flow and processes through experiments, demonstrations, adaptions (for real projects in specified areas such as SERDES, etc) and integration. • Document on new flows and processes for AMS DV. • Apply wide range of Digital and/or AMS DV skills to help and support AMS IP or Chip DV Teams to establish or enhance new or existing DV capabilities, including but not limited to developing scalable and portable Test bench, test cases, drivers, checkers, assertions and reference models, and running RTL and Gate Level simulations and reaching all coverage closures. • Contribute to continuous improving on AMS DV process for better quality and efficiency through methodology and process improvements. • Communicate and collaborate with global architecture, design, verification, and post-Silicon testing teams to address new needs or requirement on DV Support. Job Locations: • Taiwan:Hsinchu/Taipei • India: Bangalore • Singapore • USA:Santa Clara, CA/San Diego, CA
- 面議（經常性薪資達4萬元或以上） 新竹市東區 2年工作經驗 9天前更新展開
• Define GPU compiler software architecture and interfaces. • Development/implement GPU compiler pipeline, linking and various optimizations/transformations. • Collaborate with Driver team, HW team to implement new API & HW features. • Collaborate with Driver team, HW team to improve/tune performance & power consumption. • Execute & deliver to meet milestones/schedules. • Analyze and debug code generation issues. • Construct reliable & trustable relationships across teams internally & externally.
- 面議（經常性薪資達4萬元或以上） 台北市中山區 1年工作經驗 9天前更新展開
1、數位收付整合服務審核作業。 2、數位收付、繳費稅相關帳務作業。 3、數位收付營運及帳務流程優化改善建議。 4、跨部門溝通協調、協助處理數位收付營運作業問題。 5、協助防洗風控相關報表作業。 6、落實個資保護及完成主管交辦事項。
年節獎金員工生日禮金年終獎金禮品員工團保 -
