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職缺名稱公司名稱上班地點工作經驗更新薪資待遇
- 面議（經常性薪資達4萬元或以上） 新竹市東區 3年工作經驗 120天前更新展開
1.Smartphone SLT軟體整合(C/Android) 2.Smartphone SLT量產測試自動化流程改善
- 面議（經常性薪資達4萬元或以上） 新竹市東區 4年工作經驗 120天前更新展開
1. Develop systematic algorithms to alleviate design challenges, including implementation, process what-if assessment, system performance evaluation, in advanced nodes or package 2. Closely work with foundry and EDA vendors to define innovative HPC, Chiplet design methodologies 3. Explore new EDA features and define improvement direction from MTK product requirements
- 面議（經常性薪資達4萬元或以上） 新竹市東區 6年工作經驗 211天前更新展開
1. 新產品開發討論 2. 電源管理IC及電源管理單元晶片整合 3. 與設計/生產/品保/軟體部門溝通協調 4. 晶片開發滿足智慧手機, IOT, 車用, 以及ASIC的需求
- 面議（經常性薪資達4萬元或以上） 新竹市東區 2年工作經驗 120天前更新展開
1. WiFi/BT/GPS/FM connectivity IC驗證及系統應用 2. PMIC or PCIe 系統設計及驗證 3. Connectivity 系統性能優化及驗證 4. Connectivity參考電路設計及驗證 5. 協助客戶量產過程時提供技術支援
- 面議（經常性薪資達4萬元或以上） 新竹市東區 3年工作經驗 211天前更新展開
1. 電源管理晶片架構與系統設計(手機/車用) 2. 低功耗設計技術開發 3. 混合訊號數位 IP 設計: voltage regulator, ADC, system clocking and start-up, TOP infra/bus, peripheral designs 4. 電源管理晶片整合: front-end and back-end integration
- 面議（經常性薪資達4萬元或以上） 新竹市東區 6年工作經驗 211天前更新展開
1. 平台電源管理系統架構設計與規格定義, 包含功耗/溫度/性能等系統分析. 2. 系統應用詳細電源需求與控制架構之分析與優化 3. 電源管理芯片規格制定與新技術之開發.
- 時薪196元 台北市大安區 工作經歷不拘 120天前更新展開
Do you want to be part of a smart and passionate team of researchers, advancing artificial intelligence to the next level of end-user experience in their daily lives? MediaTek is seeking driven and brilliant young students to join our efforts by providing Internship placements. We are currently working to expand the frontiers of Deep Learning frameworks for Computer Vision and Natural Language Processing and we hope you can join us! The ideal candidate is open-minded, passionate about learning theory, and looks forward to both practical and challenging problems. • You will be working towards or recently have completed a PhD in a quantitative field such as Computer Science, Mathematics, Physics or Engineering. • You have a good knowledge of the foundations of Deep Learning and Neural Networks, including some experience with Machine Learning frameworks (Tensorflow, PyTorch, JAX) • You are a proficient scientific communicator. You are committed to your goals and working in a team. • You are eager to tackle the state of the art problems in the field. We want your ideas to shine! As a Deep Learning Researcher in our team, you will collaborate with our Researchers and with worldwide colleagues, stay up and above the state of the art, initiate with novel ideas, and develop them into algorithms and applications that make the real difference in everyday devices. You will also push your contribution by publishing at top-tier conferences, such as NeurIPS, ICML, ICLR, CVPR, ACL, ICRA, ACM.
- 月薪29500~50000元 新竹市東區 3年工作經驗 120天前更新展開
開發模擬以及PoC測試平台, 工作包括 - 實作分散式運算架構 - 利用Kubernetes container 管理架構 - 實作概念性驗證
- 時薪196~200元 雲林縣虎尾鎮 工作經歷不拘 2天前更新展開
1. 通訊產品介紹與銷售，協助客戶挑選適合的設備。 2. 中華電信相關業務辦理，協助客戶選擇最適資費方案。 3. 新夥伴會有完整教育訓練，歡迎無經驗有服務熱忱的你。 4. 處理各項店務作業，如收銀結帳、庫存盤點、門市清潔，讓你更了解門市運營模式。 5. 上班地點離家近，上班不用人擠人。 6. 工作氣氛好，跟可愛的門市夥伴一起打拚。 **偶爾需配合店點輪調** 神腦國際有完善的公司制度與新人教育訓練 歡迎喜愛與人互動且熱愛銷售的你一同加入我們！
國內、外旅遊補助員工及眷屬喪葬補助員工購物優惠三節獎金分紅入股 - 面議（經常性薪資達4萬元或以上） 新竹市東區 2年工作經驗 211天前更新展開
1. 系統應用電源需求與控制架構分析 2. 電源管理晶片規格制定與驗證 3. 類比電路開發與驗證 4. 驗證電路板設計 5. 自動化測試開發
- 面議（經常性薪資達4萬元或以上） 新竹市東區 4年工作經驗 120天前更新展開
1. DFT architecture exploration & evaluation for next-gen process node & package technology of MediaTek: * Scan chain insertion & ATPG pattern generation * Pattern validation through simulation & silicon analysis(pass/fail, shmoo, fail log, etc.) * Diagnosis to help manufacture process improvement 2. Co-work with SoC architect, RTL designer, physical design engineer, and package engineer to define best architecture for 3D-IC: * PPA(Performance/Power/Area) impact analysis & mitigation via DFT innovation * Develop & integrate DFT-related RTL design modules to test chip
- 面議（經常性薪資達4萬元或以上） 新竹市東區 2年工作經驗 120天前更新展開
• Work with the architecture/micro-architecture/design teams to do white box testing. • Create testplans based on the micro-architecture document with the design team. • Build, maintain and upgrade testbenches and their components using UVM-based methods. • Build custom BFMs for co-sim based module level verification. • Add assertions and checkers to facilitate verification. • Work with the design team to do module level formal verification. • Create controlled random testcases. Pre-debug and provide debug reports. • Check functional coverage and code coverage.
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