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職缺名稱公司名稱上班地點工作經驗更新薪資待遇
- 面議（經常性薪資達4萬元或以上） 新竹縣寶山鄉 工作經歷不拘 55天前展開
【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=5303&source=1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. In 2023, the company served 528 customers with 11,895 products for high performance computing, smartphones, IoT, automotive, and consumer electronics, and is the world’s largest provider of logic ICs with annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and its ESMC subsidiary plans to begin construction on a fab in Germany in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. DWTD team is part of TSMC‘s Intelligent Manufacturing Center (IMC), composed of experienced engineers and developers who are passionate about simplifying complex processes and creating user-friendly solutions. We have extensive experience in processing automation projects and we are well-versed in the background of building workflow automation systems. The team is also include process domain experts and devops experts, who also played a important role in the conception of DWTD. With their combined expertise, the team has developed a low-code system that enables engineers to define clear SOP steps and build workflow automation faster, reducing the time and effort required for requirement confirmation and knowledge transfer between different organizations. The team‘s objective is not only to offer a low-code interface for establishing workflows but also to provide a user-friendly workflow validation and maintenance service to enable engineers to efficiently manage their workflows with minimal risk. Responsibilities: 1. Product function design and system development/maintenance to realize TSMC‘s in-house low code platform for necessary digital transformation. 2. Responsible for internal software product development and providing operation consideration design to improve development and manufacturing efficiency. 3. Design and manage the high availability and high-performance systems to achieve non-stop FAB operations. 4. Collaborate with product managers and FAB users to develop high-value requirements and deliver solutions for improvement of user experience on manufacturing, yield, tool and people productivity. Work Location: Hsinchu/Taichung/Tainan On-Call Requirements: New employees are not required to be on call for the first six months. On-call duty is required for one week every three months. In case of incidents affecting the production line, it is necessary to remotely connect to the company for resolution.
- 面議（經常性薪資達4萬元或以上） 新竹縣寶山鄉 工作經歷不拘 55天前展開
【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=5302&source=1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. In 2023, the company served 528 customers with 11,895 products for high performance computing, smartphones, IoT, automotive, and consumer electronics, and is the world’s largest provider of logic ICs with annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and its ESMC subsidiary plans to begin construction on a fab in Germany in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Advanced Quality System Development (AQSD) is part of TSMC‘s Intelligent Manufacturing Center (IMC), responsible for three main directions: 1. Use statistical methods and conditional monitoring to inspect fab control charts, providing early warning of abnormal product yields; offer a fab defense system settings comparison platform to check that machines meet the internal control anomaly conditions set by the engineering department. 2. Develop online fab analysis platforms through Big Data, Machine Learning, and Deep Learning techniques for online yield/defect analysis to ensure the quality of wafers produced in the fab. 3. Develop systems and provide logical operations to control and implement escape mechanisms for material batch changes, measurement stages, and inspection stages, ensuring quality and optimizing product sampling rules. Responsibilities: 1. Apply machine learning/optimization algorithm to build up models for optimizing semiconductor production. 2. Develop analysis and optimization methods to enhance product quality, increase tool productivity and improve people productivity. 3. Design, develop and test prediction models with real applications in manufacturing. 4. Build a flexible framework to speed up the development process of AI models, with a focus on Large Language Models (LLMs) serving. 5. Turn exciting AI prototypes/ideas into products, leveraging LLMs and other advanced AI technologies. 6. Develop next-generation AI backend systems related to large-scale real-time data access, collection, analytics and monitoring. 7. Establish and maintain MLops processes and tools, including model deployment, monitoring, and automation. 8. Continuously improve the quality of AI production systems, particularly those utilizing LLMs. Work Location: Longtan, Hsinchu, Taichung, Tainan On-Call Needs: Newcomers do not need to be on duty for the first six months. On call for 1 week every 3 months.
- 面議（經常性薪資達4萬元或以上） 新竹縣寶山鄉 工作經歷不拘 55天前展開
【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=5301&source=1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. In 2023, the company served 528 customers with 11,895 products for high performance computing, smartphones, IoT, automotive, and consumer electronics, and is the world’s largest provider of logic ICs with annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and its ESMC subsidiary plans to begin construction on a fab in Germany in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. The Facility Computer Integrated Manufacturing Department (FDCIM) is part of the Intelligent Manufacturing Center (IMC) at TSMC. It is primarily responsible for the development and maintenance of the following products: 1. Development and maintenance of manufacturing-related report products for wafer fabs. 2. Development and maintenance of engineering-related report products for wafer fabs. 3. Development and maintenance of digital operation system products for facility management. 4. Development and maintenance of big data application system products for facility management. 5. Development and maintenance of facility management AI and machine learning related algorithm development and application system products. FDCIM also employs software engineering and modular development techniques, combined with high-performance database application technologies, to develop systematized software with a unified version control system that accommodates different time zones and languages globally. In addition to its regular software product development work, FDCIM is also engaged in the research and development of new technologies, including the application of DevOps, Microservices, MLOps, AIOps, and more. Responsibilities: 1. Develop and maintain AI/ML systems and algorithms 2. Collaborate with cross-functional teams to identify and solve business problems using AI/ML techniques 3. Design and implement machine learning models and data pipelines 4. Test and validate AI models for accuracy, scalability, and efficiency 5. Deploy AI solutions to production environments 6. Stay up-to-date with the latest advancements in AI technologies and industry trends 7. Write clean and efficient code using HTML, CSS, and JavaScript 8. Optimize web applications for speed and scalability 9. Test and debug web applications across multiple browsers and devices 10. Stay up-to-date with the latest front-end development trends and best practices Work Location: Longtan/Hsinchu/Zhunan/Taichung/Tainan/Kaohsiung Upon meeting qualifications, those with strong foreign language communication skills may have the opportunity to be assigned to overseas fabs.
- 面議（經常性薪資達4萬元或以上） 新竹縣寶山鄉 工作經歷不拘 55天前展開
【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=5300&source=1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. In 2023, the company served 528 customers with 11,895 products for high performance computing, smartphones, IoT, automotive, and consumer electronics, and is the world’s largest provider of logic ICs with annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and its ESMC subsidiary plans to begin construction on a fab in Germany in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. AQSD (Advanced Quality System Development) is part of TSMC‘s Intelligent Manufacturing Center (IMC), responsible for three main directions: 1. Use statistical methods and conditional monitoring to inspect fab control charts, providing early warning of abnormal product yields; offer a fab defense system settings comparison platform to check that machines meet the internal control anomaly conditions set by the engineering department. 2. Develop online fab analysis platforms through Big Data, Machine Learning, and Deep Learning techniques for online yield/defect analysis to ensure the quality of wafers produced in the fab. 3. Develop systems and provide logical operations to control and implement escape mechanisms for material batch changes, measurement stages, and inspection stages, ensuring quality and optimizing product sampling rules. Responsibilities: 1. AQSD Engineer for Quality system development using C#, python, Delphi, Web programming like java script, react/angular/Vue framework, etc. 2. A highly motivated individual with a background and capability to design a system to support quality management and solve Fab problems. 3. Working with a team which may include integration, module, quality team to achieve productivity, efficiency and quality excellence. 4. Analysis and optimize Fab quality management and delivery good solution. 5. Be responsible for sustaining ownership such as system operations. Work Location: Longtan, Hsinchu, Taichung, Tainan On-Call Needs: Newcomers do not need to be on duty for the first six months. On call for 1 week every 3 months.
- 面議（經常性薪資達4萬元或以上） 新竹縣竹北市 工作經歷不拘 2天前展開
Job description ・Technical support of customer Contact to project owner and discuss about technical issue Update of evaluation results ・Development of chemical solution for Semiconductor manufacturing process Leading of product development Technical discussion with Taiwan/Japan site RD members Career Over 2-3 years experienced of RD field in chemical supplier for Semiconductor Or fresh graduates from graduate school (Experience of formulation design of CMP products(slurry and post clean) and functional clean products preferred) Chemical company preferred Having experience both development and technical support preferred 主要為半導體製程之研磨劑、洗淨劑相關配方研發及客戶端技術支援
三節獎金員工團保伙食津貼房屋（租賃）補助上下班車資補助 - 面議（經常性薪資達4萬元或以上） 新竹市東區 工作經歷不拘 4天前展開
應徵條件： 1. 瑞昱強力招募(1)115年度研發替代役及(2)預聘115年應屆畢業之碩士、博士生。 2. 碩士以上之電子、電機、電信、電控、資工等相關科系，並具下列任一條件者佳： a. 熟C、C++、Assembly、Linux、SPICE、Matlab、Cadence EDA環境。 b. 熟類比電路設計、數位信號處理及有興趣者。 c. 具ADC、PLL相關經驗及有興趣者。 d. 對通訊網路、聯網多媒體、多媒體、電腦週邊、智慧互聯產品或程式設計有濃厚興趣者。
就業保險產假產檢假安胎假家庭照顧假 - 面議（經常性薪資達4萬元或以上） 新竹市東區 工作經歷不拘 4天前展開
應徵條件： 1. 瑞昱強力招募(1)115年度研發替代役及(2)預聘115年應屆畢業之碩士、博士生。 2. 碩士以上之電子、電機、電信、電控、資工、資科等相關科系，並具下列任一條件者佳： a. 熟悉C/C++、硬體描述語言(Verilog)和驗證語言(Vera/systemVerilog)。 b. 具IC設計經驗者佳。 c. 對晶片設計驗證或程式設計有濃厚興趣者。
就業保險產假產檢假安胎假家庭照顧假 - 1111南台灣職場小語
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- 面議（經常性薪資達4萬元或以上） 新竹市東區 工作經歷不拘 4天前展開
應徵條件： 1. 瑞昱強力招募(1)115年度研發替代役及(2)預聘115年應屆畢業之碩士、博士生。 2. 碩士以上之電子、電機、電信、電控、資工、資科等相關科系，並具下列任一條件者佳： a. 熟悉數位信號處理、數位通信系統。 b. 熟悉於影像系統或數位影像處理，或影像壓縮/解壓縮演算法。 c. 熟悉計算機架構或對SoC設計有興趣者。 d. 具有電路設計、製程整合、元件經驗或有興趣者。 e. 熟悉HDL設計。 f. 對通訊網路、聯網多媒體、多媒體、電腦週邊、智慧互聯、車用電子產品或程式設計有濃厚興趣者。
就業保險產假產檢假安胎假家庭照顧假 - 面議（經常性薪資達4萬元或以上） 新竹市東區 工作經歷不拘 4天前展開
應徵條件： 1. 瑞昱強力招募(1)115年度研發替代役及(2)預聘115年應屆畢業之碩士、博士生。 2. 碩士以上之電子、電機、電信、通訊、電控、資工、資科等相關科系，並具下列任一條件者佳： a. 對影像處理演算法熟悉或有興趣。 b. 熟悉語音訊號前置處理與語音辨識或有興趣。 c. 對通訊實體層或跨層演算法設計有興趣者，熟通信協定標準者尤佳。
就業保險產假產檢假安胎假家庭照顧假 - 面議（經常性薪資達4萬元或以上） 新竹市東區 工作經歷不拘 4天前展開
應徵條件： 1. 瑞昱強力招募(1)115年度研發替代役及(2)預聘115年應屆畢業之碩士、博士生。 2. 碩士以上之電子、電機、電信、電控等相關科系，並具下列任一條件者佳： a. 熟悉相關tools(Astro, Encounter, IC Compiler)者。 b. 熟悉IC後段設計流程, 具相關APR經驗及有興趣者。 c. 對於開發及推廣Physical Design Flow有興趣者。 d. 具程式設計(TCL,Perl,C/C++)能力者佳。
就業保險產假產檢假安胎假家庭照顧假 - 面議（經常性薪資達4萬元或以上） 新竹市東區 工作經歷不拘 4天前展開
應徵條件： 1. 瑞昱強力招募(1)115年度研發替代役及(2)預聘115年應屆畢業之碩士、博士生。 2. 碩士以上之電子、電機、電信、電控、資工及通信等相關科系，並具下列任一條件者佳： a. 熟悉CMOS元件特性。 b. 熟悉SRAM/其他記憶元件特性。 c. 熟悉Hspice, Hsim等simulation tool, Virtuso, Laker等layout tool. d. 對SRAM/其他記憶體電路設計、測試與生產有興趣者。
就業保險產假產檢假安胎假家庭照顧假 - 面議（經常性薪資達4萬元或以上） 新竹市東區 工作經歷不拘 4天前展開
應徵條件： 1. 瑞昱強力招募(1)115年度研發替代役及(2)預聘115年應屆畢業之碩士、博士生。 2. 碩士以上之電子、電機、電信等相關科系。 a. 對RF IC設計有興趣者。 b. 熟CMOS/SiGe RF設計及通訊系統經驗尤佳。
就業保險產假產檢假安胎假家庭照顧假 - 面議（經常性薪資達4萬元或以上） 新竹市東區 工作經歷不拘 4天前展開
應徵條件： 1. 瑞昱強力招募(1)115年度研發替代役及(2)預聘115年應屆畢業之碩士、博士生。 2. 碩士以上之電子、電機、電信、通訊、電控、資工、資科等相關科系，並具下列任一條件者佳： a. 熟C、C++、Linux、Assembly，具DSP及audio/video processing相關經驗或興趣者。 b. 多媒體影音系統開發經驗或興趣者。 c. 具網路embedded system開發經驗。 d. 熟網路基本概念。 e. 對RF、Microwave, AD/DA, FPGA硬體設計有興趣者。 f. 具實體層數位信號處理設計有興趣，並熟DMT、OFDM或ASIC邏輯線路設計者尤佳。 g. 對通訊網路、聯網多媒體、多媒體、電腦週邊、智慧互聯或車用電子產品之系統韌體或程式設計有濃厚興趣者。
就業保險產假產檢假安胎假家庭照顧假 - 面議（經常性薪資達4萬元或以上） 新竹市東區 工作經歷不拘 4天前展開
應徵條件： 1. 瑞昱強力招募(1)115年度研發替代役及(2)預聘115年應屆畢業之碩士、博士生。 2. 碩士以上；電機、資訊等相關科系，並具下列任一條件者佳： a. 熟悉Verilog RTL、Synthesis、Simulation、Timing Analysis 等相關 IC Design Flow及有興趣者。 b. 熟悉 Design for Testability 技術，包含 Scan / ATPG、Delay Test、Memory BIST、Boundary Scan、Diagnosis 等及有興趣者。 c. 有 DFT Tools (如 DFT Compiler、TetraMAX、BSD Compiler、FastScan、TestKompress、MBISTArchitect) 使用經驗及有興趣者。 d. 積極負責、勇於迎接挑戰，對於 Nanometer / SoC DFT Implementation、開發及推廣設計流程有興趣者。
就業保險產假產檢假安胎假家庭照顧假 -
