面議(經常性薪資達4萬元或以上) 新竹縣寶山鄉 工作經歷不拘 1天前
【本職缺僅接受台積電官方網站投遞】
請至台積電官方網站投遞個人履歷表,此職缺履歷登錄網址:
https://careers.tsmc.com/careers/JobDetail?jobId=16521&source=1111
Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. In 2023, the company served 528 customers with 11,895 products for high performance computing, smartphones, IoT, automotive, and consumer electronics, and is the world’s largest provider of logic ICs with annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and its ESMC subsidiary plans to begin construction on a fab in Germany in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade.
We are seeking a highly motivated and talented R&D Engineer to join our team in developing advanced IC packaging technologies. This position offers an exciting opportunity to work on cutting-edge solutions, such as CoWoS (Chip-on-Wafer-on-Substrate), Fan-Out Wafer Level Packaging (FOWLP), and 3DIC (Three-Dimensional Integrated Circuits). The ideal candidate will have strong technical expertise and a passion for innovation in semiconductor packaging design and analysis.
Join us in shaping the future of advanced IC packaging technologies and contributing to groundbreaking innovations in the semiconductor industry. This role provides a unique opportunity to work in a dynamic environment, solve challenging engineering problems, and make a meaningful impact on next-generation packaging solutions.
Responsibilities:
1. Conduct risk assessments and provide mitigation plans for IC packages through simulation and experiment, interpreting experimental data and simulation to provide insights into material selection and design improvements.
2. Practice FEM and DOE in problem solving and path finding particularly on packaging. Conduct mechanical or thermal simulations using finite element analysis (FEA) techniques to evaluate and optimize packaging performance, and analyze stress, deformation, and heat dissipation characteristics to ensure reliability and efficiency of packaging designs.
3. Continuously improve simulation methodology, refine material modeling, and enhance script automation capabilities.
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