1. 電源管理晶片架構與系統設計(手機/車用)
2. 低功耗設計技術開發
3. 混合訊號數位 IP 設計: voltage regulator, ADC, system clocking and start-up, TOP infra/bus, peripheral designs
4. 電源管理晶片整合: front-end and back-end integration
• Work with the architecture/micro-architecture/design teams to do white box testing.
• Create testplans based on the micro-architecture document with the design team.
• Build, maintain and upgrade testbenches and their components using UVM-based methods.
• Build custom BFMs for co-sim based module level verification.
• Add assertions and checkers to facilitate verification.
• Work with the design team to do module level formal verification.
• Create controlled random testcases. Pre-debug and provide debug reports.
• Check functional coverage and code coverage.
• Lead the DV effort of a high-end CPU project.
• Manage, coach and guide DV engineers. Follow up status and keep up the schedule.
• Architect and implement top-module testbenches and their components using UVM-based methods.
• Lead the effort of building in-house BFMs to facilitate co-sim based module level verification.
• Architect and implement formal verification based module level testbench.
• Work with the design team to create testplans. Implement checkers/assertions/coverage check points.
• Work with validation folks to improve design visibility