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職缺名稱公司名稱上班地點工作經驗更新薪資待遇
- 月薪38000元 台南市新市區 工作經歷不拘 今天展開
【日月光高雄廠】製程工程師招募｜7/25 假日徵才 平日工作忙、請假面試不方便嗎？ 日月光高雄廠將於台南舉辦假日現場徵才，歡迎想進入半導體產業、或正在尋找轉職機會的你，利用週末時間與我們面對面交流，了解工作內容、薪資福利與職涯發展。 製程工程師是半導體製造中非常關鍵的角色，主要負責製程條件優化、良率改善、異常分析與材料開發。你將參與產品量產過程中的問題解決與改善推動，透過數據分析、跨部門合作與現場驗證，協助提升製程穩定度與產品競爭力。 【工作內容】 製程計畫安排與製程條件優化 製程良率改善、異常分析與改善對策追蹤 提升產品製程能力與生產穩定度 材料特性評估、材料改善與新材料開發 協助產品量產導入、製程問題排除與跨部門溝通 透過數據分析與現場驗證，推動製程改善專案 【應徵條件】 歡迎學士以上、理工相關科系背景者投遞。 材料、化工、化學、機械、電機、電子、物理、半導體、工工等相關背景尤佳。 具製程、研發、材料、品保、設備或半導體相關經驗者佳；無相關經驗但對半導體製程有興趣者，也歡迎了解。 【工作地點】 南科廠，依職缺需求與面談結果安排。 【薪資福利】 薪資依學經歷、專業背景與面談結果核定，具相關製程、品保、材料、半導體或工程經驗者，將依經驗另行評估。 加班費、獎金及公司福利另計。 【適合這樣的你】 如果你喜歡分析問題、改善流程，也希望自己的專業能實際影響產品良率與製程穩定度，製程工程師會是很適合發展的職涯方向。 在這裡，你不只是處理問題，更是推動半導體製造持續進步的重要角色。 【假日現場徵才，歡迎投遞履歷或現場了解!】
國外旅遊員工聚餐慶生會尾牙自強活動 - 面議（經常性薪資達4萬元或以上） 新竹縣寶山鄉 工作經歷不拘 今天展開
【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=22578&source=1111&tags=AO+2027_1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. As of 2024, TSMC serves more than 500 customers and manufactures over 11,000 products for high-performance computing, smartphones, the Internet of Things (IoT), automotive, and digital consumer electronics. It is the world’s largest provider of logic ICs, with an annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and the Company began construction on a specialty technology fab in Dresden, Germany, in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Responsibilities: 我們確保晶片的品質、持續提升良率，提供給客戶具有競爭力且高品質的晶片，讓電子產品不但先進且效能穩定；製程整合工程師為半導體製造中的重要協調者，需要與客戶溝通了解客製化的晶片應用需求，再將訊息帶回廠內，與各工程單位合作。良率精進工程師監控晶片的良率與缺陷，使用量測機台監測晶片的缺陷，找出可能的問題，再與製程解決問題。 1. A highly motivated individual with a strong technical background and capabilities to develop and sustain process technologies for logic, flash memory, and specialty products. 2. Working with a team which may include device, integration, yield, lithography, etch and thin films or external suppliers to drive leading-edge integrated module development, control and improvements. 3. Be responsible for sustaining ownership such as day-to-day operations, troubleshooting equipment and mentoring technicians. Fostering a global inclusive workplace reflects TSMC’s core values and business philosophy and is essential for our future success. Our commitment to global inclusive workplace allows us to create an environment where every employee, regardless of gender, age, disability, religion, race, ethnicity, nationality, political affiliation, or sexual orientation, can bring their unique perspective and experiences to work, enabling us to drive profitability, increase productivity, and unleash innovation. We strive to create a workplace that is equitable and accessible to all employees. We are committed to fostering an inclusive culture where every employee feels valued and empowered to contribute to our mission and provide excellent service to our global customers.
- 月薪50000~65000元 台南市新市區 工作經歷不拘 今天展開
請提前投遞職缺報名，也歡迎現場了解與面談！ 活動地點：C-Hub成大創意基地 1.定期維護、保養生產設備機台 2.生產機台故障排除及異常查修 3.設備問題改善及異常分析與追蹤處理 4.維持生產機台設備的正常運轉 ※ 無經驗可(完整在職訓練) 薪資條件： 工作20天(含5天加班天) 早班50,000~55,000元(含早班津貼及加班費) 夜班60,000~65,000元(含晚班津貼及加班費)
國外旅遊員工聚餐慶生會尾牙自強活動 - 面議（經常性薪資達4萬元或以上） 新竹縣寶山鄉 工作經歷不拘 今天展開
【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=22576&source=1111&tags=AO+2027_1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. As of 2024, TSMC serves more than 500 customers and manufactures over 11,000 products for high-performance computing, smartphones, the Internet of Things (IoT), automotive, and digital consumer electronics. It is the world’s largest provider of logic ICs, with an annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and the Company began construction on a specialty technology fab in Dresden, Germany, in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Responsibilities: 1. Novel process/device/product developing for Specialty technologies. 2. Process Integration/Module, Device Analysis/Simulation, Modeling, Test-chip design tape out and WAT/Bench measurement system developing. 3. Collaborate with related teams for Design Collaterals (DRM/DRC/LVS/SPICE/PDK) developing. Fostering a global inclusive workplace reflects TSMC’s core values and business philosophy and is essential for our future success. Our commitment to global inclusive workplace allows us to create an environment where every employee, regardless of gender, age, disability, religion, race, ethnicity, nationality, political affiliation, or sexual orientation, can bring their unique perspective and experiences to work, enabling us to drive profitability, increase productivity, and unleash innovation. We strive to create a workplace that is equitable and accessible to all employees. We are committed to fostering an inclusive culture where every employee feels valued and empowered to contribute to our mission and provide excellent service to our global customers.
- 月薪50000~65000元 台南市新市區 工作經歷不拘 今天展開
CIM自動化設備工程師招募｜南科廠｜7/25 假日徵才 請提前投遞職缺報名，也歡迎現場了解與面談！ 活動地點：C-Hub成大創意基地 1.自動化機構保養 2.自動化機構異常排除/分析 3.自動化作業資料分析 工作時間:需配合四班二輪(做2休2)輪班，2個月輪一次早晚班 **【加班費、輪班津貼、獎金另計】**
國外旅遊員工聚餐慶生會尾牙自強活動 - 面議（經常性薪資達4萬元或以上） 新竹縣寶山鄉 工作經歷不拘 今天展開
【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=22575&source=1111&tags=AO+2027_1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. As of 2024, TSMC serves more than 500 customers and manufactures over 11,000 products for high-performance computing, smartphones, the Internet of Things (IoT), automotive, and digital consumer electronics. It is the world’s largest provider of logic ICs, with an annual capacity of over 17 million 12-inch equivalent wafers in 2025. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and the Company began construction on a specialty technology fab in Dresden, Germany, in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Description : At the beginning of new module research, IC design engineers and R&D engineers would closely cooperate with customers. Once the new module technologies are developed, we could accomplish the goal of massive production and have customers’ new product launch in a short time. At TSMC, you will have the opportunity to work with the most advanced module technologies, provide solutions to partners in the global IC design ecosystem, and ensure competitiveness in power, performance, and area. Responsibilities: 1. Physical Designer The principal responsibility of the candidate is to perform complete netlist to GDS physical design steps which include floor plan, PNR, timing closure, IR/EM analysis, layout verification, formal verification, and other tape out related tasks. The candidate will work in a talented team to design advanced chips using cutting-edge process nodes while meeting high standard design requirements. 2. Standard Cell Engineer (1) Pathfinding of library characterization for leading edge tech nodes. (2) Support industrial standard library kits generation and QC. (3) In-house library generation flow and/or utility development. (4) RC parasitic extraction analysis and APR related analysis. 3. Layout Engineer (1) IC layout for advanced technology (Std. cell/Memory/AMS/IO). (2) Layout structure development for new technology. (3) Pathfinding for new technology development. (4) Customer engagement and layout support. (5) Design and technology co-optimization (DTCO). (6) AI and automation for layout and physical design. 4. System and Chip Design Solutions Development Please refer to the Link: https://careers.tsmc.com/zh_TW/careers/JobDetail?jobId=516 5. FE design & DFT (1) Test chips development for advanced nodes, including physical design (APR), logic synthesis and DFT (Scan insertion + ATPG). (2) Design flow development for test chips design, which requires the programming skills, Tcl, Python, C-shell scripting etc. (3) Technology benchmarking for PPA evaluation of the advanced nodes. (4) DTCO (Design & Technology Co-Optimization) pathfinding and development. 6. SRAM Engineer (1) SRAM design in advanced nodes for mobile, high-performance computing, IoT, automotive applications. (2) RRAM/MRAM, emerging memory development. (3) In memory computing research and development. 7. Design Flow/Methodology (1) Advanced technology process design kits (PDK) and tech files (DRC, LVS, RC, etc.) development and technical support. (2) Advanced technology design development flow development and technical support. (3) Automation program development to support design kits and flow development. productivity/quality. Fostering a global inclusive workplace reflects TSMC’s core values and business philosophy and is essential for our future success. Our commitment to global inclusive workplace allows us to create an environment where every employee, regardless of gender, age, disability, religion, race, ethnicity, nationality, political affiliation, or sexual orientation, can bring their unique perspective and experiences to work, enabling us to drive profitability, increase productivity, and unleash innovation. We strive to create a workplace that is equitable and accessible to all employees. We are committed to fostering an inclusive culture where every employee feels valued and empowered to contribute to our mission and provide excellent service to our global customers.
- 月薪50000~65000元 台南市新市區 工作經歷不拘 今天展開
1.定期維護、保養生產設備機台 2.生產機台故障排除及異常查修 3.設備問題改善及異常分析與追蹤處理 4.維持生產機台設備的正常運轉 ※ 無經驗可(完整在職訓練) 薪資條件： 工作20天(含5天加班天) 早班50,000~55,000元(含早班津貼及加班費) 夜班60,000~65,000元(含晚班津貼及加班費) *高雄南科廠正式生產前，將先於高雄楠梓廠訓練，之後再依照南科廠產能作調動。
國外旅遊員工聚餐慶生會尾牙自強活動 - 1111南台灣職場小語
徵【助理】無經驗可、週休二日/固定休六日
- 面議（經常性薪資達4萬元或以上） 新竹縣寶山鄉 工作經歷不拘 今天展開
【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=22574&source=1111&tags=AO+2027_1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. As of 2024, TSMC serves more than 500 customers and manufactures over 11,000 products for high-performance computing, smartphones, the Internet of Things (IoT), automotive, and digital consumer electronics. It is the world’s largest provider of logic ICs, with an annual capacity of over 17 million 12-inch equivalent wafers in 2025. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and the Company began construction on a specialty technology fab in Dresden, Germany, in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Description : Come and join an innovative and challenging team, where groundbreaking ideas shape the future of semiconductor technology. As an R&D Engineer, you will work on advanced technology development, such as exploratory research in advanced device architectures, device and process integration for manufacturability, advanced module process development, as well as the evaluation of novel materials, equipment, and processes. Responsibilities: 1. Research & Pathfinding (1) New material and new process pathfinding to enable new device architecture with integration. (2) New tool pathfinding for new materials to enable the next nodes. (3) Design, execute and analyze experiments to meet R&D engineering specifications. (4) Process stability & manufacturability improvement for yield and reliability qualification. (5) Process/tool transfer to development R&D or volume manufacturing (Fab). (6) Highly motivated individuals with a strong technical background and teamwork skills. 2. Integration For Device Engineers: (1) Transistor Architecture & Design: Pioneering device design for advanced nodes. (2) Advanced Characterization: Defining the parameters of technological progress by characterizing state-of-the-art devices, establishing SPICE modeling targets, and conducting bench electrical measurements (I-V, C-V). (3) Simulation & Modeling: Utilizing TCAD (Technology Computer-Aided Design) and HSPICE to simulate device characteristics, optimize performance, and fortify model integrity. (4) Test Key Design: Crafting precision test key designs to facilitate accurate electrical modeling, design rule validation, and comprehensive device characterization. (5) Customer design enablement: Providing SPICE Model. For Integration Engineers (or Process Integration Engineers) : (1) Process Flow Integration: Integrating devices across various process modules (Lithography, Etch, Thin Films/Epi, Diffusion, CMP) to build a robust, manufacturable baseline for yield and device learning. (2) Experimentation & Lot Handling: Designing advanced Experiments (DOE) to meet device KPIs. Periodically serving as the on-duty engineer to coordinate and handle device lots in the R&D fab. (3) Yield & Reliability Learning: Conducting big data analysis (using JMP, Python, or custom iEDA tools) to identify process design weaknesses, hardware issues, or yield detractors. (4) Technology Transfer: Transitioning the proven, optimized advanced integration baseline process from the R&D phase to fab for high-volume manufacturing. 3. Module R&D Engineer (1) Pioneer Next-Generation Technologies: Research and develop advanced processes, novel materials, next-generation tooling, and cutting-edge computational/simulation methodologies for leading-edge semiconductor nodes. (2) Drive High-Impact Innovation: Deliver highly manufacturable, stable, and cost-effective process technologies. Optimize device physics and performance to meet stringent yield, reliability, and qualification standards. (3) Bridge Lab-to-Fab Scaling: Lead the technology transfer of advanced processes and hardware solutions from R&D phase to High-Volume Manufacturing (HVM) fabs, witnessing your research scale into global production. 4. R&D Process Center (1) PE: Develop advanced module process, optimizing stability and manufacturability to ensure high yield and reliability. Transfer processes and tools to volume manufacturing while collaborating with cross-functional teams and external suppliers to drive leading-edge module integration. Additionally, manage day-to-day operations, troubleshoot equipment, and mentor technicians to sustain operational excellence. (2) EE: Manage advanced semiconductor equipment (Diffusion, Thin Film, Lithography, or Etching) by performing warm-ups, troubleshooting, and efficiency enhancements. Plan and execute defect detection projects to analyze performance while collaborating closely with cross-functional engineers and vendors to ensure optimal equipment productivity and stability. (3) MFG: Oversee daily IC foundry operations, managing work schedules, direct labor, and cross-functional collaboration (PE/PIE/EQ) to ensure consistent service delivery. Drive productivity, manage multiple projects with overlapping deadlines, and analyze data to keep operations running smoothly. Additionally, contribute to process improvements and maintain robotic/detection systems to meet customer and business objectives.
- 月薪33000~38000元 高雄市大寮區 工作經歷不拘 今天展開
1. 電腦CNC銑床機台操作 2. CNC線上巡檢作業 3. CNC加工程式偵錯 4. 作業流程改善 5. 加工刀具校正及鎖付 6. 工件裝夾 ※具CNC相關經驗或視圖能力尤佳 ※廠房24小時冷氣開放作業
就業保險產檢假產假年節獎金員工生日禮金 - 月薪38000~42000元 高雄市前鎮區 工作經歷不拘 1天前展開
規劃建置 ： 新網路環境評估、架構規劃與實體建置。 維運排障 ： 網路監控、負載分析與異常排除。 優化資安 ： 設備汰換、資安計畫執行。 備援演練： 網路備援機制規劃與年度災難復原演練。 網路架構： 熟悉 TCP/IP、OSI 7 層區及 LAN 區域網路規劃。 設備管理： 具備 Switch 與 Router 運作機制管理與排障實例。 系統機房： 熟悉 IT 機房作業、微軟/UNIX 系統、資料庫(DB)與虛擬化(VM)。
年終獎金三節獎金意外險員工團保員工及眷屬住院慰問金 - 月薪41000~57000元 新北市泰山區 工作經歷不拘 1天前展開
CAD1部｜DRC / LVS / LPE 工程師 一、部門簡介 CAD1部主要負責 IC 設計流程中的實體驗證與寄生參數萃取環境建置，涵蓋 DRC、LVS、LPE 等核心 CAD 技術，支援先進製程、記憶體產品、客製化 layout 驗證、rule deck 開發、PDK 對接與自動化流程建置。 本職務需與 TD、Layout、Circuit design、ME、Foundry/外部合作單位密切合作，確保設計規則、驗證流程與實際 layout 結果一致，提升設計品質、驗證效率與 tape-out 穩定度。目前工作也延伸至 3DIC、multi-die、HBM、hybrid bonding 等新型封裝與多晶片整合相關 CAD 挑戰。 二、主要工作內容 1. DRC Rule Deck 開發與維護 依據製程 Design Manual / Rule Spec / ESD 撰寫與維護 DRC deck。 將製程規則轉換為可驗證的 Calibre rule command。 建立 test case、驗證golden layout、regression flow，確認 rule deck 正確性。 分析 false error、missing check、corner case，持續提升 deck 品質。 2. LVS 驗證流程建置與除錯 維護 ICV LVS rule deck、device recognition、connectivity extraction 與 netlist comparison flow。 協助 layout / circuit design team 分析 LVS mismatch、short/open、device parameter mismatch 等問題。 釐清問題來源為 layout、schematic、rule deck、device definition 或 flow setting。 3. LPE / PEX 寄生參數萃取支援 建置與維護寄生參數萃取流程，如 RC extraction、net mapping、device mapping、post-layout simulation support。 協助分析 LPE 結果與 circuit simulation 間的差異。 支援先進製程、記憶體 array、custom circuit、high-speed interface 等 layout extraction 需求。 4. CAD Flow 與自動化開發 使用 Tcl、Python、Shell 等工具開發layout自動化流程。 建立 runset、command file、log parser、report generator、QA regression flow。 改善 DRC/LVS/LPE runtime、debug efficiency 與 release quality。 5. PDK / Foundry / 內部流程整合 驗證 PDK、rule deck、tech file、layer map、device map、constraint file 的完整性與一致性。 協助導入新製程、新工具版本、新 OS 環境與新 CAD flow。 支援內部使用者問題排查、教育訓練與文件化。 6. 跨部門技術溝通與問題解決 與 TD 確認 rule intent，避免規則認知差異造成誤抓或漏抓。 與 Layout team 合作分析 verification error，提供 debug 建議。 與 Circuit design team 釐清 LPE、LVS、sign-off 相關議題。 參與新 node、新產品、新平台的 CAD 支援規劃。 三、必要條件 電機、電子、資工、物理、工程科學或相關理工科系畢業。 熟悉 IC layout 基本概念，如 layer、polygon、net、device、cell hierarchy、GDS/OASIS。 具備 DRC、LVS、LPE/PEX 任一領域經驗。 熟悉 Linux/Unix 操作環境。 具備基本 script 開發能力，例如 Tcl、Python、Perl、Shell。 具備良好的問題分析能力，能從 log、layout、rule deck、netlist 中定位問題。 能閱讀英文技術文件、tool manual、design rule document。 具備跨部門溝通能力，能將技術問題整理成清楚的說明與改善方案。 四、加分條件 熟悉 Siemens Calibre DRC/LVS/xRC、Synopsys StarRC、IC Validator 或相關 EDA tool。 具備 SVRF、TVF、PEX rule、device extraction rule 撰寫經驗。 有 memory、DRAM、analog、custom layout 或先進製程支援經驗。 熟悉 PDK release、CAD flow release、regression test、QA methodology。 具備 GDS/OASIS data processing、layout auto generation、pattern generation 經驗。 有 DRC/LVS/LPE runtime improvement 或 large-scale layout debug 經驗。 有 2.5D/3DIC、TSV、hybrid bonding、HBM、multi-die verification 經驗尤佳。 具備良好的文件撰寫能力，能建立 guideline、debug note、training material。 五、適合的人格特質 喜歡分析複雜問題，能耐心追查 root cause。 對 IC layout、EDA tool、CAD flow 有興趣。 做事細心，重視驗證品質與 release 正確性。 願意與不同單位溝通，能把模糊需求轉成可執行規格。 喜歡透過自動化改善重複性工作。 面對新製程、新工具、新技術時，願意持續學習與建立方法論。 六、職務發展方向 此職位未來可往以下方向發展： DRC / LVS / LPE sign-off flow owner Rule deck / PDK methodology owner CAD automation / verification platform developer Advanced node / 3DIC / HBM CAD solution owner CAD project lead / technical lead
員工電影國內旅遊員工聚餐尾牙家庭日 - 月薪45000~60000元 新竹市東區 工作經歷不拘 3天前展開
1. 工作內容： - 遵守安全規範，確保職業安全與個人健康。 - 負責 Chiller 設備的裝機、維修保養與紀錄。 - 執行設備巡檢與故障排除，維持機台正常運作。 - 提供技術諮詢與支援，建立良好客戶關係，妥善處理客戶抱怨並維持有效溝通。 - 內部作業：ISO 流程、零件庫存掌控與清點。 - 處理主管交辦事項。 2. 工作環境：半導體廠(具無塵室經驗者佳)。 3. 工作經驗： 具備半導體設備相關現場服務、裝機與售後服務經驗尤佳。 4. 配合輪值夜間/假日on call(提供值班津貼)，出勤另給加班費。
員工在職教育訓練良好升遷制度年節獎金年終獎金產假 - 月薪39700~52000元 台南市善化區 工作經歷不拘 3天前展開
此角色需配合現場節奏與班別制度運作，適合能在穩定流程與清楚規範下，踏實執行並累積專業價值的人。 1.執行使用者允收測試 2.執行操作/保養規範作業 3.執行&回復機台運行能力
有休息寢室員工餐廳書報室家庭日國內、外旅遊補助 - 月薪40000~48000元 台中市潭子區 工作經歷不拘 3天前展開
1.執行材料儲存/收/發料/繳庫/確保安全性等作業及庫存帳務管理 2.執行週期盤點作業 3.執行包裝客戶需求退回晶圓 4.點檢-執行晶圓庫房定期必要點檢 5.執行逾期及報廢品之庫存處理
有休息寢室員工餐廳書報室家庭日國內、外旅遊補助 -
