- 面議（經常性薪資達4萬元或以上） 新竹市東區 10年工作經驗 37天前更新展開
• Lead the DV effort of a high-end CPU project. • Manage, coach and guide DV engineers. Follow up status and keep up the schedule. • Architect and implement top-module testbenches and their components using UVM-based methods. • Lead the effort of building in-house BFMs to facilitate co-sim based module level verification. • Architect and implement formal verification based module level testbench. • Work with the design team to create testplans. Implement checkers/assertions/coverage check points. • Work with validation folks to improve design visibility
- 面議（經常性薪資達4萬元或以上） 新竹市東區 10年工作經驗 37天前更新展開
Work in Analog/Mixed-Signal Modeling and Verification Methodology Development group to establish, streamline and enhance new and existing AMS Behavioral Modeling related development method, coding and validation process and integration flows, and work hands-on with AMS IP Teams for AMS Behavioral Modeling flow and process experiments, demonstrations, adaptions, and deployment. The candidate will work with AMS IP teams including digital design, analog design, analog behavioral modeling and design verification members, apply and advance existing and evolving AMS Behavioral Modeling methodologies and processes, and contribute to establish and maintain Modeling Platform to ensure High Quality and High Efficiency of Pre-Si AMS Modeling, Validation and Verification delivery towards high quality silicon products. • Work in methodology development group to establish, streamline and enhance new and existing AMS Behavioral Modeling related development method, coding and validation process and integration flows. • Work with teams to enable deployment of new AMS Behavioral Modeling flow and processes through experiments, demonstrations, adaptions (for real projects in specified areas such as RF, etc) and integration. • Document on new flows and processes for AMS Behavioral Modeling. • Apply wide range of AMS Behavioral Modeling skills to help and support AMS IP or Chip Teams to establish or enhance new or existing Modeling capabilities, including but not limited to Model Development, Model Validation to ensure Consistency of Behavior with Original Circuit, Integration of Models into various Verification Environment, fixing Modeling issues found in simulation, etc. • Contribute to continuous improving on AMS Behavioral Modeling process for better quality and efficiency through methodology and process improvements. • Communicate and collaborate with global architecture, design, verification teams to address new needs or requirement on AMS Behavioral Modeling. Job Locations: • Taiwan:Hsinchu/Taipei • India: Bangalore • Singapore • USA:Santa Clara, CA/San Diego, CA
- 面議（經常性薪資達4萬元或以上） 新竹市東區 10年工作經驗 37天前更新展開
Work in Analog/Mixed-Signal Design Verification Methodology Development group to establish, streamline and enhance new and existing AMS DV related development method, coding process and integration flows, and work hands-on with AMS IP Teams for AMS DV flow and process experiments, demonstrations, adaptions, and deployment. The candidate will work with digital design, analog design, analog behavioral modeling and design verification teams, apply and advance existing and evolving Digital and AMS Verification methodologies and processes, and contribute to establish and maintain Verification Platform to ensure High Quality and High Efficiency of Pre-Si Verification Delivery towards high quality silicon products. • Work in methodology development team to establish, streamline and enhance new and existing AMS DV related development method, coding process and integration flows. • Work with teams to enable deployment of new flow and processes through experiments, demonstrations, adaptions (for real projects in specified areas such as SERDES, etc) and integration. • Document on new flows and processes for AMS DV. • Apply wide range of Digital and/or AMS DV skills to help and support AMS IP or Chip DV Teams to establish or enhance new or existing DV capabilities, including but not limited to developing scalable and portable Test bench, test cases, drivers, checkers, assertions and reference models, and running RTL and Gate Level simulations and reaching all coverage closures. • Contribute to continuous improving on AMS DV process for better quality and efficiency through methodology and process improvements. • Communicate and collaborate with global architecture, design, verification, and post-Silicon testing teams to address new needs or requirement on DV Support. Job Locations: • Taiwan:Hsinchu/Taipei • India: Bangalore • Singapore • USA:Santa Clara, CA/San Diego, CA
- 面議（經常性薪資達4萬元或以上） 新竹市東區 6年工作經驗 7天前更新展開
參與先進製程下ASIC及其他產品的開發與導入。 支援新產品線，如CPO、IVR、cHBM......等技術的設計、驗證與量產導入。 與跨部門團隊合作，解決產品開發過程中的技術問題，確保專案順利執行。 持續追蹤先進半導體製程與新穎封裝技術的產業動態，提供技術建議。
- 面議（經常性薪資達4萬元或以上） 新竹市東區 2年工作經驗 37天前更新展開
• Define GPU compiler software architecture and interfaces. • Development/implement GPU compiler pipeline, linking and various optimizations/transformations. • Collaborate with Driver team, HW team to implement new API & HW features. • Collaborate with Driver team, HW team to improve/tune performance & power consumption. • Execute & deliver to meet milestones/schedules. • Analyze and debug code generation issues. • Construct reliable & trustable relationships across teams internally & externally.
- 面議（經常性薪資達4萬元或以上） 台北市內湖區 2年工作經驗 99天前更新展開
負責開發5G SOC的軟/韌體並讓產品量產 1. 開發/Porting/優化5G晶片的軟/韌體 2. 開發/維護 5G 網通/網卡/模組等相關功能
- 面議（經常性薪資達4萬元或以上） 新竹縣竹北市 2年工作經驗 66天前更新展開
1. 架構和數位電路設計 2. RTL實做和驗證 3. SoC chip整合和RTL到gate level實現, 包含timing分析跟量產測試 4. 設計方法和整合流程改善
- 面議（經常性薪資達4萬元或以上） 新竹市東區 工作經歷不拘 37天前更新展開
1. Work on 3~7nm design implementation, methodology, and sign-off 2. Perform synthesis, DFT, floorplan, clock planning, place and route, timing closure, ECO, IR signoff, and physical verification 3. Manage schedule, resolve design and flow issues, drive methodologies and execution
- 面議（經常性薪資達4萬元或以上） 台北市內湖區 2年工作經驗 37天前更新展開
1. LCD Monitor IC相關的韌體開發 2. 影像處理相關應用與支援客戶產品開發 3. LCD Monitor周邊軟體tool開發
- 面議（經常性薪資達4萬元或以上） 台北市內湖區 工作經歷不拘 128天前更新展開
1. 支援客戶產品的開發 2. LCD Monitor 或Retimer FW的開發與應用 3. 協助產品的推廣 4. LCD Monitor UI 的設計 以及訊號的處理
- 面議（經常性薪資達4萬元或以上） 新竹縣竹北市 工作經歷不拘 37天前更新展開
1. Work with design teams to do performance sign off in pre-silicon stage 2. ESL platform and simulation/emulation technology development. 3. Model development (includes behavior modeling/ cycle approximate modeling)
- 面議（經常性薪資達4萬元或以上） 新竹市東區 2年工作經驗 37天前更新展開
• 此職位屬於聯發科技modem客戶工程團隊，該團隊任務為與內部研發團隊合作，支援全球一流智能手機客戶的無線通訊技術(包括LTE、5G Sub-6GHz和5G mmWave技術)。 • 此職位主要職責在與客戶合作過程中帶領技術討論，並與內外部不同團隊合作，共同討論並解決客戶問題、滿足需求。 • 此職位需具備深入研究技術問題、了解客戶需求分析與功能開發的能力及良好應變能力。 • This is an exciting role in the MediaTek wireless technology group within the modem customer engineering team working with internal R&D team and support tier-1 global smartphone customers in wireless technologies (LTE, 5G Sub-6GHz, and 5G mmWave technologies) • You will play a key technical role in working with internal and external stakeholders to lead technical discussion and drive customer issues to resolution. • This is a dynamic position that will interact and collaborate with different teams and site location. • Ability to deep dive technical issues, understand customer requirement analysis and feature development. Looking for 4G/5G Modem Protocol / System Engineer with technical breadth in the protocol stack.
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