- 面議（經常性薪資達4萬元或以上） 新竹市東區 2年工作經驗 173天前更新展開
1. 系統應用電源需求與控制架構分析 2. 電源管理晶片規格制定與驗證 3. 類比電路開發與驗證 4. 驗證電路板設計 5. 自動化測試開發
- 面議（經常性薪資達4萬元或以上） 新竹市東區 4年工作經驗 82天前更新展開
1. DFT architecture exploration & evaluation for next-gen process node & package technology of MediaTek: * Scan chain insertion & ATPG pattern generation * Pattern validation through simulation & silicon analysis(pass/fail, shmoo, fail log, etc.) * Diagnosis to help manufacture process improvement 2. Co-work with SoC architect, RTL designer, physical design engineer, and package engineer to define best architecture for 3D-IC: * PPA(Performance/Power/Area) impact analysis & mitigation via DFT innovation * Develop & integrate DFT-related RTL design modules to test chip
- 面議（經常性薪資達4萬元或以上） 新竹市東區 2年工作經驗 82天前更新展開
• Work with the architecture/micro-architecture/design teams to do white box testing. • Create testplans based on the micro-architecture document with the design team. • Build, maintain and upgrade testbenches and their components using UVM-based methods. • Build custom BFMs for co-sim based module level verification. • Add assertions and checkers to facilitate verification. • Work with the design team to do module level formal verification. • Create controlled random testcases. Pre-debug and provide debug reports. • Check functional coverage and code coverage.
- 面議（經常性薪資達4萬元或以上） 新竹市東區 10年工作經驗 82天前更新展開
• Lead the DV effort of a high-end CPU project. • Manage, coach and guide DV engineers. Follow up status and keep up the schedule. • Architect and implement top-module testbenches and their components using UVM-based methods. • Lead the effort of building in-house BFMs to facilitate co-sim based module level verification. • Architect and implement formal verification based module level testbench. • Work with the design team to create testplans. Implement checkers/assertions/coverage check points. • Work with validation folks to improve design visibility
- 面議（經常性薪資達4萬元或以上） 新竹市東區 6年工作經驗 52天前更新展開
參與先進製程下ASIC及其他產品的開發與導入。 支援新產品線，如CPO、IVR、cHBM......等技術的設計、驗證與量產導入。 與跨部門團隊合作，解決產品開發過程中的技術問題，確保專案順利執行。 持續追蹤先進半導體製程與新穎封裝技術的產業動態，提供技術建議。
- 面議（經常性薪資達4萬元或以上） 新竹市東區 2年工作經驗 82天前更新展開
• Define GPU compiler software architecture and interfaces. • Development/implement GPU compiler pipeline, linking and various optimizations/transformations. • Collaborate with Driver team, HW team to implement new API & HW features. • Collaborate with Driver team, HW team to improve/tune performance & power consumption. • Execute & deliver to meet milestones/schedules. • Analyze and debug code generation issues. • Construct reliable & trustable relationships across teams internally & externally.
- 面議（經常性薪資達4萬元或以上） 台北市內湖區 2年工作經驗 144天前更新展開
負責開發5G SOC的軟/韌體並讓產品量產 1. 開發/Porting/優化5G晶片的軟/韌體 2. 開發/維護 5G 網通/網卡/模組等相關功能
- 面議（經常性薪資達4萬元或以上） 新竹縣竹北市 2年工作經驗 111天前更新展開
1. 架構和數位電路設計 2. RTL實做和驗證 3. SoC chip整合和RTL到gate level實現, 包含timing分析跟量產測試 4. 設計方法和整合流程改善
- 面議（經常性薪資達4萬元或以上） 新竹市東區 工作經歷不拘 82天前更新展開
1. Work on 3~7nm design implementation, methodology, and sign-off 2. Perform synthesis, DFT, floorplan, clock planning, place and route, timing closure, ECO, IR signoff, and physical verification 3. Manage schedule, resolve design and flow issues, drive methodologies and execution
- 面議（經常性薪資達4萬元或以上） 台北市內湖區 2年工作經驗 82天前更新展開
1. LCD Monitor IC相關的韌體開發 2. 影像處理相關應用與支援客戶產品開發 3. LCD Monitor周邊軟體tool開發
- 面議（經常性薪資達4萬元或以上） 台北市內湖區 工作經歷不拘 173天前更新展開
1. 支援客戶產品的開發 2. LCD Monitor 或Retimer FW的開發與應用 3. 協助產品的推廣 4. LCD Monitor UI 的設計 以及訊號的處理
- 面議（經常性薪資達4萬元或以上） 新竹縣竹北市 工作經歷不拘 82天前更新展開
1. Work with design teams to do performance sign off in pre-silicon stage 2. ESL platform and simulation/emulation technology development. 3. Model development (includes behavior modeling/ cycle approximate modeling)
-
