- 面議（經常性薪資達4萬元或以上） 新竹市東區 5年工作經驗 1天前更新展開
熟悉 layout tool : Virtuoso/CustomCompiler verification : Hercules/calibre/ICV 『具工作經驗者，薪資另議』
員工電影國內旅遊員工聚餐尾牙家庭日 - 面議（經常性薪資達4萬元或以上） 台北市南港區 工作經歷不拘 今天剛更新展開
Please also apply unto our platform: https://nxp.wd3.myworkdayjobs.com/careers/job/Taipei/Supply-Chain-Planner_R-10062641 Job Description Supply Chain Modeling -Manage the integral supply chain to match demand and supply, using the master planning system -Drive to set Supply Chain Parameters (e.g. Supply Chain Model, Lead times, Safety Stocks) in planning system according to product life cycle. S&OP Support -Cowork together with BU/BL Capacity planners on S&OP process -Review resource loading situation impacting S&OP. Order Management -SO Management: Be responsible for fulfillment of customer sales orders, customer programs forecast and safety stock replenishment -PO Management: Plan and release feasible plans to manufacturing sites fulfilling demand and loading policy. Monitor and control supply deviation -Based on demand and supply situation, communicate with BU/BL to align business strategy -Returns Management: Support and arrange returns (quality, technical, logistics and commercial returns) according to relevant procedures. -Exceptional Management: a) In case of allocation, follow allocation process and decision b) In case of tight supply, co- work with BU/BL and Customer Service and Site for production priority to prevent customer line down c) Support New Product Introduction Improvements / PDCA -Regular review KPI and initiate improvement activities in case KPIs are below targets -Participate in projects Education Degree in business administration, industrial engineering or information management (preferable) Personal Requirements - Integral working and thinking style - Analytical thinking - Independence / problem solving - Team player with good cooperation and information conduct
分紅入股年終獎金三節獎金激勵獎金員工團保 - 面議（經常性薪資達4萬元或以上） 新竹市東區 10年工作經驗 今天剛更新展開
The key areas of responsibility of the jobholder are: - Collaborate closely with foundries, NXP technology teams, and business lines to qualify and release advanced FinFET processes. - Provide technical leadership in semiconductor device physics, especially in FinFET architecture and behavior. - Interface with internal and external stakeholders on critical development and transfer projects. - Lead and steer projects to meet timelines and business objectives. - Make key decisions on process integration, balancing technical, logistical, and strategic factors. - Support NTI process transfers within foundries and NXP joint ventures Requirements / preferences: - Bachelor‘s or Master‘s degree in Electrical Engineering, Physics, or related field. - Minimum 10 years of experience in semiconductor device engineering, with a strong focus on advanced logic/RF devices. - Proven hands-on experience with HKMG and FinFET technologies in production or development environments. - Deep understanding of semiconductor device physics, especially HKMG and FinFET. - Strong analytical skills in yield enhancement and electrical data analysis. - Fluent in English and Mandarin. - Demonstrated leadership in development, transfer, or ramp-up projects. - Excellent communication and influencing skills. - Proactive, pragmatic, and results-driven mindset. - Experience working with foundries and leveraging external manufacturing capabilities .
分紅入股年終獎金三節獎金激勵獎金員工團保 - 面議（經常性薪資達4萬元或以上） 新竹市東區 10年工作經驗 今天剛更新展開
***Please apply for this position on NXP official website: https://pse.is/8ms2kr Role Purpose Lead the development and optimization of high-voltage (HV) and BCD device architectures. This role requires a deep understanding of device physics and a data-driven approach to ensure industry-leading performance and reliability for power management solutions. Key Responsibilities － Device Development: Lead the architecture design and optimization of HV devices (LDMOS, EDMOS, ESD) on 180nm to 55nm BCD nodes. － Physics Analysis: Analyze and optimize Device Physics parameters, including BV, Rdson, SOA, and reliability (HCI/NBTI). － Simulation & Modeling: Utilize TCAD for 2D/3D process and device simulations to accelerate development cycles. － Device Verification: Define verification plans and execute statistical analysis using JMP for DOE and WAT data. － Design Integration: Work within Cadence environments for layout review and test structure design. － Cross-functional Collaboration: Partner with PI and PE teams to resolve yield, reliability, and manufacturing bottlenecks. Required Qualifications － Experience: Master‘s or Ph.D. in EE, Physics, or related field with 10+ years of semiconductor industry experience. － Technical Expertise: 1. Profound knowledge of Device Architecture and Device Physics. 2. Hands-on experience in 180nm to 55nm BCD process nodes. － Tools: 1. Expertise in TCAD (Sentaurus / Silvaco). 2. Expertise in JMP for statistical data analysis. 3. Proficiency in Cadence (Layout/Virtuoso). Preferred Qualifications (Plus) － Advanced Power Devices: Experience with GaN, SiC, or IGBT development. － Silicon Photonics: Knowledge of Photonics integration and device physics. － Domain Knowledge: 1. Process Integration (PI): Understanding of mask flow and doping profiles. 2. Product Engineering (PE): Experience in CP/FT data correlation and yield enhancement. Competencies － Accountability: Strong ownership of project milestones and outcomes. － Critical Thinking: Ability to identify root causes in complex device failures. － Interpersonal Skills: Effective communication across design and foundry teams. － Data-driven: Committed to objective decision-making through rigorous data analysis.
分紅入股年終獎金三節獎金激勵獎金員工團保 - 面議（經常性薪資達4萬元或以上） 新竹市東區 10年工作經驗 今天剛更新展開
Role Summary: The NVM Reliability team is responsible for characterizing, modeling, and enabling next-generation Non-Volatile Memory technologies, enabling new product creation company-wide. Job Responsibility: －Interface with foundries and other external suppliers of technology and IP to assess reliability margin to product applications. －Establish qualification requirements for new technology and product introduction. －Perform rigorous statistical analysis of reliability characterization data. －Enable high reliability during volume production by working with product groups to address risk areas. －Support business groups with customer requests for technical information, including reliability characterization results, risks assessments, and consultation on issues. －Communicate study conclusions and recommendations to internal and external teams. Job Qualification: －Bachelor‘s, Masters, or Doctoral degree in Electrical Engineering, Applied Physics, or equivalent, with 10 years of industry experience. －Experienced in data processing and analysis (e.g. Python, JMP, Matlab, Exensio). －Software development experience, such as familiarity with microcontroller software development (C/C++) is desired. －Interest in statistics and solid-state device fundamentals, especially as applied to emerging non-volatile memory technologies like MRAM and RRAM. －Must be curious, proactive, and detail-oriented. －Able to work in a team environment, communicate effectively in English and Mandarin, and solve problems.
分紅入股年終獎金三節獎金激勵獎金員工團保 - 面議（經常性薪資達4萬元或以上） 高雄市楠梓區 3年工作經驗 今天剛更新展開
Job Responsibilities - To be the owner for manufacturing test on the released products. - Responsible for test program introduce to mass production - Responsible for NPI (after R-gate released) test data analysis and feedback to BL/PETE if any improvement needed - To be the owner for duplicated test hardware by performing debug and qualification, MSC (Gage R&R) analysis and release report - Responsible for 1st line hold lot disposition, including low yield, QA fail .......etc - To initial and work with related process owners on testing processes, documentation, and best practices - Participate in or drive test automation initiatives when applicable Required Qualifications - 3+ years of experience as a Test Engineer - Solid understanding of software/system testing methodologies - Familiarity with Linux environments and command-line operations - Experience with machine language (e.g., Java, C++) - Experience in system, embedded, hardware, or manufacturing testing - Strong analytical and problem-solving skills - Strong sense of ownership and responsibility for product quality English communication, reading, writing
分紅入股年終獎金三節獎金激勵獎金員工團保 - 面議（經常性薪資達4萬元或以上） 新竹市東區 5年工作經驗 今天剛更新展開
Please also apply on our platform: https://nxp.wd3.myworkdayjobs.com/careers/job/Hsinchu/APAC-Foundry-Operations-Senior-Principal-Engineer_R-10062827 Job Description The APAC Foundry Operation team works with foundry partners on technologies which are evaluated and/or subjected to production. The key areas of responsibility of the jobholder are: - Lead the release and transfer of process options at foundries. - Close collaboration with foundries, NXP technology groups, the business lines and various other stakeholders to qualify and release process - Lead and steer the projects towards timely completion to support NXP business needs. - Main decision maker on subjects related to process integration, striking a good balance between the various dynamics in a project; not limiting to technical judgement, resource planning, project schedule, logistics, supplier relationships etc. The requirement fulfilling the job: - Bachelor or MSc in physics, material engineering or electrical engineering. In-depth knowledge of semiconductor physics, process development and manufacturing. - ＞10 years of experience with semiconductor process integration, working in foundries’ production or development teams. - Hands on experience in being a lead; leading teams with responsibilities in development, transfer or production projects. - All rounded knowledge on process integration, product testing, reliability testing, tapeouts, device physics will be needed in the discharge of duties as a project/ integration lead. - Good communication skills. - Pro-active working attitude, creative, pragmatic, enterprising and result driven. - Having the ability to influence and steer a discussion. - Familiar in managing/working with foundries, maximizing leverage from foundries.
分紅入股年終獎金三節獎金激勵獎金員工團保 - 面議（經常性薪資達4萬元或以上） 新竹縣竹北市 工作經歷不拘 今天剛更新展開
Please also apply through: https://nxp.wd3.myworkdayjobs.com/careers/job/Hsinchu/Tape-Out-Engineer_R-10063230 Role Overview, Responsibilities, and Qualifications The Tape Out Engineer plays a crucial role in the semiconductor design process, serving as the final checkpoint before integrated circuit designs are sent for fabrication. This position is responsible for ensuring that all physical and logical design data meet manufacturing requirements and quality standards, working closely with design, program managers, technologists, and manufacturing teams to resolve issues and optimize outcomes. Key Responsibilities 1. Coordinate and execute the tape out process for semiconductor products, ensuring timely and accurate delivery of design data to manufacturing. 2. Verify design integrity by reviewing database and documentation, and addressing any discrepancies or errors. 3. Work collaboratively with cross-functional teams, including design, technologists, program managers, and process engineering, to resolve technical issues and optimize designs for manufacturability. 4. Ensure all deliverables conform to foundry requirements. 5. Maintain detailed records of tape out procedures, revisions, and outcomes for future reference and process improvement. Qualifications 1. Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field (Master’s preferred). 2. Experience with physical design tools (e.g., Cadence, Synopsys) and semiconductor manufacturing workflows. 3. Excellent attention to detail, problem-solving skills, and ability to work under tight deadlines. 4. Willingness to work with flexible working hours to support critical Tape-outs. Effective communication in English for collaborating across technical teams. This role is ideal for individuals with a passion for precision and innovation, seeking to contribute to the successful launch of leading-edge semiconductor products.
分紅入股年終獎金三節獎金激勵獎金員工團保 - 面議（經常性薪資達4萬元或以上） 新竹市東區 工作經歷不拘 今天剛更新展開
Please also apply on our platform: https://nxp.wd3.myworkdayjobs.com/careers/job/Hsinchu/Principal-Process-Integration-Engineer_R-10063266 Job Description 【Why This Role?】 Drive Core Technology: Lead the integration and development of advanced CMOS processes and Non-Volatile Memory (NVM), directly impacting product performance and market competitiveness. Lead Mass Production Breakthroughs: Take ownership of the critical path from New Product Introduction (NPI) to high-volume manufacturing, defining technical specifications and Best Known Methods (BKM). Cross-Domain Collaboration: Bridge the gap between design teams and Tier-1 Foundries, exerting technical influence at advanced process nodes (28nm and below). 【Key Responsibilities】 Process Integration Leadership: Lead the design of CMOS and NVM process flows; optimize device performance to achieve industry-leading yield and reliability benchmarks. Deep Characterization & Analysis: Conduct statistical and Physical Failure Analysis (PFA) for fail modes; proactively identify process defects and drive optimization solutions. Yield Enhancement & Stability: Spearhead cross-functional yield improvement programs to ensure production stability and cost-efficiency. Foundry Management: Lead technical teams in collaboration with international major foundries, managing technical alignment, communication, and process transfer. 【Required Qualifications】 Education: Master’s degree or PhD in Electronics, Electrical Engineering, Physics, Materials Science, or a related field. Experience: 10+ years of semiconductor industry experience, with a focus on CMOS logic processes or NVM technologies (eFlash, RRAM, MRAM). Data Insight: Proficiency in data analysis tools (e.g., JMP, Python, or Spotfire) with a proven ability to analyze complex statistical distributions and electrical characteristics. 【Preferred Skills】 Process Transfer Expertise: Successful track record in 〝Copy-Smart〝 process migration, ensuring process consistency and rapid yield ramp-up during technology transfer. BCD Process Expertise: Experience in BCD (Bipolar-CMOS-DMOS) process development or integration; familiarity with PMIC (Power Management IC) optimization. Advanced Node Experience: Proven experience in NVM integration and mass production at 28nm/16nm/12nm or beyond. Design Collaboration: Solid understanding of memory architecture, NVM operation principles, and peripheral circuit design. 【Soft Qualities】 Analytical Thinking: Ability to synthesize complex data into actionable insights and identify root causes of technical anomalies. Proactive Ownership: Courage to transcend functional boundaries and mobilize resources to overcome technical bottlenecks. Effective Communication: Excellence in translating complex engineering issues into clear, actionable optimization strategies for design and process teams.
分紅入股年終獎金三節獎金激勵獎金員工團保 - 月薪36000~48000元 台南市新市區 工作經歷不拘 3天前更新展開
公司期待透過完整的人資專業養成、制度建立及人才發展規劃，使同仁未來逐步成長為資深人資專員、人資主管及集團經營策略部門管理幹部。 【團隊成長與多元學習福利】 ★ 本職缺無經驗可！只要您肯學，我們就願意傾囊相授。 ★ 我們鼓勵每位員工在職進修、積極考取專業技術證照。 ★ 公司提供多元化的學習環境，不侷限於單一技術，讓您的職涯發展更加全面。 ★ 我們非常期望認真、負責、樂於學習的您加入團隊，與我們一同成長！ 本職務為公司人力資源管理與組織發展的重要核心成員，負責人才招募、員工關係、教育訓練、人事行政、薪酬管理及制度推動，透過專業的人資管理與跨部門協調能力，協助公司建立穩定、成長及高效能的組織。
員工在職教育訓練產假產檢假意外險員工團保 - 月薪33000~42000元 台南市新市區 工作經歷不拘 3天前更新展開
公司期待透過完整之教育訓練、制度建立與實務歷練，使同仁逐步晉升為資深行政專員、行政管理師、經營管理專員及部門管理幹部。 【團隊成長與多元學習福利】 ★ 本職缺無經驗可！只要您肯學，我們就願意傾囊相授。 ★ 我們鼓勵每位員工在職進修、積極考取專業技術證照。 ★ 公司提供多元化的學習環境，不侷限於單一技術，讓您的職涯發展更加全面。 ★ 我們非常期望認真、負責、樂於學習的您加入團隊，與我們一同成長！ 本職務為公司行政管理與營運支援核心，負責整合行政、總務、會議管理、文件管理及跨部門協調工作，確保公司日常營運順暢、制度有效執行及各項專案運作正常。
員工在職教育訓練產假產檢假意外險員工團保 - 月薪30000~35000元 新竹縣竹北市 工作經歷不拘 15天前更新展開
★工作內容： 1.黃光/電鍍/蝕刻 等製程作業 2.線上異常排除以及排程管理作業 ★須早/中輪班 早班上班時間：08:30-17:30 中班上班時間：16:30-01:00 【自我推薦獎金】 即日起，主動應徵本職缺，並到職滿三個月(試用過後成為正職員工)，可得獎金6,000元。 獎勵期間自即日起至2025/12/31，視招募情況可提前結束。
員工在職教育訓練國內旅遊員工健身房員工餐廳書報室 - 月薪36000元 台南市新市區 1年工作經驗 2天前更新展開
1. ISO文件制修訂、審核及發行管理。 2. 文件版次管制與有效文件維護。 3. 受控文件分發、回收及作廢管理。 4. 品質紀錄建檔、保存及歸檔管理。 5. 協助內外部稽核文件準備與追蹤。
就業保險產假產檢假安胎假家庭照顧假 -
