- 面議（經常性薪資達4萬元或以上） 台北市大安區 工作經歷不拘 2天前更新展開
工作內容及任務： 1.依國科會專案計畫執行需求，協助籌辦各式會議與相關工作。 2.負責執行「科學技術白皮書」、「全國科學技術會議」與「技術發展動態趨勢」計畫之業務。 3.支援配合主管交辦任務。
年終獎金產假產檢假家庭照顧假生日假 - 月薪44000~49000元 新竹縣竹北市 工作經歷不拘 2天前更新展開
1. 負責科技廠區內之安全巡邏，包括建築物內外及周邊環境的巡視，確保無異常狀況。 2. 監控科技廠區出入人員，進行訪客登記與引導，嚴格檢查進出口，確保出入安全。 3. 操作監控設備，及時觀察並記錄可疑活動，並對發生的安全事件進行妥善記錄和回報。 4. 熟悉緊急應對程序，包括火災、防竊、防災應變能力，並能快速處理各類突發事件。 5. 執行建築或廠區設備的基本巡檢，協助報告維護需求，確保設備正常運作。 6. 管理並操作門禁系統、鑰匙管理及停車場管理，維護公共安全及順暢的出入秩序。 7. 熟悉安全與消防法規，定期演練相關程序，並具備基本急救能力以應對緊急情況。 期待您的加入！加入我們的竹北科技廠保全團隊，共同維護廠區的安全與和諧！立即投遞履歷吧！
- 月薪45000元 彰化縣埔鹽鄉 工作經歷不拘 1天前更新展開
1. 廠區日常庶務管理與巡檢 2. 廠內修繕報修聯繫及施工現場協調 3. 廢棄物清運安排與廠商聯繫 4. 工具、備品、耗材整理與清點管理 5. 協助廠區環境維護與公共區域管理 6. 初一、十五拜拜用品採買及相關安排 7. 協助簡易行政作業與資料整理 8. 主管交辦事項
產假產檢假全勤獎金年節獎金員工生日禮金 - 面議（經常性薪資達4萬元或以上） 台北市內湖區 2年工作經驗 43天前更新展開
1. 資料中心AI晶片架構設計與RTL實作 2. 資料中心SoC與AI運算平台設計與驗證 3. 系統匯流排與AI週邊設計 4. SoC系統效能分析
- 面議（經常性薪資達4萬元或以上） 台北市內湖區 4年工作經驗 43天前更新展開
- 針對下一代資料中心產品，推動並導入 SoC 層級的先進功耗優化技術；與 RTL、合成與布局團隊協作，完成低功耗功能的架構規劃與導入。 - 於各設計階段（RTL → 閘級 → 佈局後）進行功耗估算與分析，提出可執行的省電建議與改善方向。 - 與 Tier-1 客戶合作制定功耗規格，並提供下一代產品的功耗估算結果與技術說明。 - 支援樣品回片後的功耗量測比對（silicon correlation）與功耗相關問題除錯（sample back / bring-up）。
- 面議（經常性薪資達4萬元或以上） 桃園市大園區 工作經歷不拘 今天剛更新展開
1.透過雲端後台與管理系統分析問題與提出改善報告 2.現場與基礎建設廠商對應及安裝、測試充電站 3.技術服務協助（維護、分析和故障排除） 3.對客戶、服務團隊人員教育訓練 4.主管交辦事項
全勤獎金年節獎金年終獎金三節獎金產假 - 面議（經常性薪資達4萬元或以上） 台北市內湖區 6年工作經驗 43天前更新展開
- 透過推動跨部門在技術需求、介面定義與交付項目上的一致性，協調先進封裝解決方案的開發（例如 CoWoS、2.5D/3.5D 整合，以及 Chiplet 架構）。 - 主導 SoC Floorplanning 以最佳化 PPA（功耗、效能與晶片面積），並在時序收斂、繞線壅塞、電源域邊界，以及 PDN／熱設計等考量間取得平衡。 - 與封裝團隊合作制定並優化 Ball/Bump 配置（bump/ball map），以滿足 SI/PI、電流承載能力、可製造性與可靠度等需求。
- 面議（經常性薪資達4萬元或以上） 新竹市東區 2年工作經驗 43天前更新展開
1. Familiar with DFT plan, methodology, implementation 2. Familiar with new DFT flow such as SSN, HSIO 3. Familar with STA, timing analysis
- 月薪42000~48000元 高雄市楠梓區 工作經歷不拘 3天前更新展開
煎台：煎台製餐、備料補料 月排休5天，半年後月排休6天 「希望我們的夥伴」 A.喜歡快步調的工作節奏、反應靈敏、動作俐落、記性好 B.個性活潑開朗、喜歡面對客人 、親切有禮貌 C.須有相關經驗
激勵獎金意外險員工團保免費供餐健保 - 面議（經常性薪資達4萬元或以上） 新竹市東區 2年工作經驗 43天前更新展開
1. SoC low power design, integration, and modeling 2. SoC adaptive voltage scaling development
- 面議（經常性薪資達4萬元或以上） 新竹市東區 10年工作經驗 43天前更新展開
Role Summary: We are seeking a Principal Product Engineer to support advanced optical product development, NPI, manufacturing transfer, production ramp, and sustaining engineering in Taiwan. This is a senior individual contributor role requiring deep hands-on experience in fiber optics, optical module manufacturing, process integration, yield improvement, and cross-functional execution with engineering, operations, quality, supply chain, and contract manufacturing teams. The ideal candidate will serve as a technical lead for optical product engineering in Taiwan, helping drive products from development builds through qualification, pilot production, and high-volume manufacturing. Key Responsibilities: • Lead product engineering execution for optical products from prototype builds through qualification, production release, and sustaining support. • Support NPI planning, engineering builds, manufacturing readiness, test readiness, process transfer, and ramp execution. • Drive technical issue resolution across optical assembly, fiber attach, process integration, module test, final test, reliability, and customer quality. • Work closely with design engineering, optical engineering, packaging, test, reliability, operations, quality, and supply chain teams. • Partner with contract manufacturers and suppliers to resolve yield, quality, process, material, and production ramp issues. • Lead data-driven yield improvement using production data, failure pareto analysis, root-cause investigation, corrective action, and process optimization. • Support development and release of optical assembly and fiber attach processes, including process flows, control plans, inspection criteria, process windows, and manufacturing release criteria. • Provide technical leadership for product characterization, margin analysis, failure analysis, reliability learning, and production excursion response. • Help define manufacturing specifications, test limits, outgoing quality controls, and product-level production metrics. • Support customer or supplier technical escalations related to product quality, manufacturing performance, or reliability.
- 面議（經常性薪資達4萬元或以上） 新竹市東區 3年工作經驗 43天前更新展開
We are looking for a DFT Engineer to define and implement DFT architectures for data center ASIC products. The role involves developing test strategies, integrating DFT features, and improving test coverage for mass production. You will work closely with design teams to ensure robust DFT solutions, yield improvement, and quality. Key Responsibilities • Develop and optimize test strategies to achieve coverage and manufacturing goals; analyze and improve test coverage. • Integrate DFT features at RTL and gate-level, supporting both top and block-level DFT planning and implementation. • Perform ATPG, fault simulation, and coverage analysis. • Collaborate with BE and PD teams to ensure DFT-friendly timing and support IR convergence in test mode. • Lead silicon bring-up and debug of test features; conduct failure and yield analysis. • Work with product teams to facilitate pattern generation, validation, and DPPM improvement.
- 面議（經常性薪資達4萬元或以上） 新竹市東區 4年工作經驗 43天前更新展開
We are looking for candidates that can communicate complex engineering subjects effectively to cross functioning technical teams and upper management. Strong DFT and testing skills will be put to good use. Successful handling with many external teams from pre-silicon phase cross to post-silicon on advance silicon and assembly process. Key Responsibilities • Drive DFT Excellence: Define DFT architecture specifications that enhance ATE and production test environments, optimize test costs, and improve quality across future MTK ASIC product portfolios. • Product test planning capability: Manage comprehensive post-silicon flow optimization, and test deployment for new product launches • Manufacturing Integration: Serve as a key contributor within MTK’s Global Quality and Operations organization to deliver optimal manufacturing test solutions from early product conception through post-silicon validation • Design Collaboration & Quality Assurance: Partner closely with design teams to ensure accurate implementation of DFT structures and compliance with specifications.
- 面議（經常性薪資達4萬元或以上） 新竹市東區 8年工作經驗 43天前更新展開
此職位高度重視執行力、組織協調以及所有ASIC設計的準時交付。 該職位負責協調涵蓋設計、驗證、PD、測試、DFT、封裝測試、營運和供應鏈等多個領域的複雜跨學科工作。 專案經理確保所有內部團隊從概念到生產全程保持一致，同時識別並克服所有風險和跨職能依賴關係。 This role is highly focused on execution excellence, organizational alignment and on-time delivery of all ASIC designs. This role coordinates complex multi-disciplinary efforts spanning, Design, Verification, Physical Design, Test Vehicles, DFT, Packaging Test, Operations and supply chain. The program manager insures that all internal groups are aligned from concept through production while identifying and overcoming all risks and cross functional dependencies.
-
