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職缺名稱公司名稱上班地點工作經驗更新薪資待遇
- 面議（經常性薪資達4萬元或以上） 新竹縣竹北市 8年工作經驗 140天前更新展開
1. Develop and execute comprehensive strategies/planning for key accounts 2. Design-Win execution thru value-selling, relationship development and professional services 3. Cross-Team Collaboration 4. Deliver Qualitative and quantitative results
- 面議（經常性薪資達4萬元或以上） 新竹市東區 8年工作經驗 140天前更新展開
1.Communicate with Business Unit (BU) managers to understand BU’s analysis needs and influence BU‘s decision. 2.Monitor and review BU’s financial performance and create actions. 3.Facilitate BU to complete solid short-term and long-term forecast and plan for whole unit, product line, or project. 4.Conduct BU related projects such as peer analysis, macro or industry impact analysis, financial modelling for new business and etc. 5.Supervise subordinates to well co-work with BU and key stakeholders.
- 面議（經常性薪資達4萬元或以上） 台北市內湖區 5年工作經驗 140天前更新展開
1. Define GPU compiler software architecture and interfaces. 2. Development/implement GPU compiler pipeline, linking and various optimizations/transformations. 3. Collaborate with Driver team, HW team to implement new API & HW features. 4. Collaborate with Driver team, HW team to improve/tune performance & power consumption. 5. Execute & deliver to meet milestones/schedules. 6. Analyze and debug code generation issues. 7. Analyze and influence future GPU architectures. 8. Construct reliable & trustable relationships across teams internally & externally. 9. The position can be located at Hsinchu or Taipei
- 面議（經常性薪資達4萬元或以上） 台北市內湖區 8年工作經驗 140天前更新展開
1. Market Analysis: Co-work with market research institutions and internal marketing teams for market data and future trend analysis 2. Business operation: Co-work with teams for solid business operation
- 面議（經常性薪資達4萬元或以上） 新竹市東區 4年工作經驗 140天前更新展開
- RTL/Logic Integration and Verification - Develop Timing Constraints for RTL-Synthesis and PrimeTime-STA for the blocks and the top level including SOC. - Use cdc tool to check RTL/SDC quality - Develop Power Intent Specification in UPF for the multi-vdd designs.
- 面議（經常性薪資達4萬元或以上） 新竹市東區 4年工作經驗 140天前更新展開
- Logic/Physical Synthesis by using advanced optimization techniques(below N7) and generate optimized Gate Level Netlist for Timing, Area, Power. - Debug the timing/area/congestion issues and work with RTL & Physical designers to resolve them. - Run Formal Verification checks between RTL and Gate level netlist and debug the aborts, inconclusive and Logic Equivalency failures. - DFT insertion, ATPG and gate-level simulation - Developing Automation scripts and Methodology for all FE-tools including (Lint, CDC, RDC, Synthesis, STA, Power). - Interact with Physical Design Engineers and provide them with timing/congestion feedback.
- 面議（經常性薪資達4萬元或以上） 東北亞日本 2年工作經驗 140天前更新展開
Power management IC design Audio IC design Data converter IC design high speed serdes IC design
- 面議（經常性薪資達4萬元或以上） 東北亞日本 4年工作經驗 140天前更新展開
1. Work for Protocol verification in System Verification, to communicate with teams and co-work with modem R&D in multiple-sites in the world 2. Drive Inter-operability test Projects, for Planning, Preparation and Test execution in Japan operators Lab and Field Test. 3. Analysis and report modem protocol related issues, to collaborate with team members in System Verification and modem R&D. 4. Track modem related issues and contribute the fast correction delivery. 5. Provide technical support, to lead prompt solution to internal/external customers
- 月薪28590~80000元 新竹市東區 工作經歷不拘 140天前更新展開
* 開發及維護新系統或已存在服務 * 學習及改善自動化流程 (CI/CD Flow) * 與研發團隊一起協助改善 R&D 開發週期 * 研究測試新技術或解決方案
- 面議（經常性薪資達4萬元或以上） 新竹市東區 4年工作經驗 140天前更新展開
分析及優化手機 5G TestBed 平台的效能，包括以下項目 1. 整合與移植不同 Linux 平台 (Ex. Ubuntu, Cent, RedHat, ...) 2. 整合與應用 Intel/AMD CPU Accelerator API (Ex. Intel Core i9 9/10/12th AVX/TBB/MKL; AMD...) 3. 分析與調校系統整體效能 (Ex. Linux Kernel, Process, Thread, Peripheral(Ethernet/PCIe/...) Driver, ...)
- 面議（經常性薪資達4萬元或以上） 台南市歸仁區 工作經歷不拘 140天前更新展開
負責開發設計無線通訊、數位電視、寬頻網路、 高速運算、人工智慧、穿戴裝置、電源管理、ASIC 等晶片的類比電路，其中包含了: 1. 高速、高解析度ADC/DAC電路，例如SAR/Pipelined/Interleaved/Incremental ADC、SDM ADC/DAC、 Current-steering/Switched-capacitor DAC 2. 高效率電源管理(PMU)電路，例如LDO、DC-DC converter、Charge-pump converter 3. 高速Serdes介面電路，例如CTLE、CDR、 PLL、DLL 、TX driver、PCIE、USB、MIPI、HDMI、Display Port 4. 高速DDR/LPDDR介面電路 5. 寬頻網路(Broadband network)、生醫感測(Bio-sensor)等類比前端電路(Analog-Front-End) 6. 音頻(Class AB/D/H)放大電路 、PGA、Oscillator、Temperature sensor 電路 7. 超低功耗類比/混合訊號電路
- 面議（經常性薪資達4萬元或以上） 新竹市東區 2年工作經驗 140天前更新展開
-建立通訊系統模擬平台及利用模擬實驗驗證系統設計 -確保通訊系統模擬平台符合3GPP標準規範以及與基站及儀器商的一致性 -修改通訊系統模擬平台以符合實際軟硬體實作設計 - Model system level behavior and validate the design by simulations - Ensure the system simulator to comply with 3GPP spec and align with infra and machine vendors - Modify the system simulator to match the practical HW/SW partition for design verification
- 月薪28590~40000元 新竹市東區 工作經歷不拘 140天前更新展開
1. 評估新創公司投資的潛在機會，包含技術評估、商業分析、盡職調查等 2. 產業分析研究 3. 協調並執行新創投資所需之相關執行事務，包含投資合約、財務模型及行政相關程序
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