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職缺名稱公司名稱上班地點工作經驗更新薪資待遇
- 面議（經常性薪資達4萬元或以上） 新竹市東區 工作經歷不拘 140天前更新展開
負責無線通訊射頻收發器IC內的類比基頻電路設計，其中包含了: 1. 類比放大器設計 2. 無電容低壓差穩壓器設計，或是bandgap電壓源設計 3. 混合訊號電路設計，包含了晶體震盪器或是相關的時序產生電路，例如鎖相迴路(PLL) Responsible for analog baseband circuit design in wireless transceiver RFIC. 1. Analog opamp, filter and TIA design 2. Foundation analog IP design, including Capless LDO, bandgap, temperature sensor. 3. Mixed mode data converter design, including over-sampling and Nyquist rate ADCs and DACs. 4. Mixed mode timing circuit design, including crystal oscillator and related timing generation circuitry, such as phase-locked loop (PLL)
- 面議（經常性薪資達4萬元或以上） 新竹市東區 2年工作經驗 140天前更新展開
MTK電源管理部門設計設計電源管理IC及電源管理單元以滿足各式各樣智慧手機, IOT, 車用, 以及ASIC的需求. 職缺包含: 1. DC-DC 轉換器 2. 線性電壓調節器 3. 切換電壓調節器
- 面議（經常性薪資達4萬元或以上） 新竹市東區 工作經歷不拘 140天前更新展開
Mediatek Analog Design and Circuit Technology (ADCT) is currently seeking experienced analog circuit designers to develop high speed, high performance and low power analog/mixed-signal circuits and PMU for wireless cellular phones, wireless LANs, smart home, wide-area networks, high performance computing, AI, IoT, automotive and ASIC. This role will include circuit analysis, design, simulation and test using innovative architectures to deliver best-in-class performance. Of particular importance will be design experience of involving at least one or more topics in the following: 1. High speed SerDes circuit design, like CTLE, CDR, DFE, PLL, DLL and TX Driver. 2. High efficient power management integrated circuit (PMIC) design, like LDO, DC-DC converter and envelop tracking (ET) power supply modulator. 3. High speed data converters, like SAR ADC, pipelined ADC, interleaved ADC, hybrid ADC, current steering DAC and switch-capacitor DAC‘s. 4. High speed DDR/LPDDR analog PHY circuit design and verification. 5. High resolution data converter, like noise shaping CT/DT DSM ADC/DAC and incremental ADC. 6. Ethernet, Bio-medical and Sensor Analog Front Ends. 7. Audio Class-AB/D amplifiers, PGA, filter, oscillators and temperature sensor. 8. Ultra-low power analog/mixed-signal circuits design for IoT. 9. Analog circuit and chip integration of Serdes, PLL, Data Converter, PMU and PMIC. 10. Work Location : HsinChu/Taipei/ChuPei
- 面議（經常性薪資達4萬元或以上） 台南市歸仁區 工作經歷不拘 140天前更新展開
負責無線通訊射頻收發器IC內的類比基頻電路設計，其中包含了: 1. 類比放大器設計 2. 無電容低壓差穩壓器設計，或是bandgap電壓源設計 3. 混合訊號電路設計，包含了晶體震盪器或是相關的時序產生電路，例如鎖相迴路(PLL)
- 面議（經常性薪資達4萬元或以上） 新竹市東區 4年工作經驗 140天前更新展開
1.Physical design RC extraction flow development and build up. 2.EDA collaboration to enhance RC extraction methodology 3.FOM RC analysis to propose DTCO opportunities
- 面議（經常性薪資達4萬元或以上） 新竹縣竹北市 2年工作經驗 140天前更新展開
1.熟悉Windows下的開發環境 2.熟悉GCC/G++ 與相關Tool Chain 3.熟悉不同平台的cross compilar 4.熟悉WiFi driver或Windows device driver的撰寫
- 面議（經常性薪資達4萬元或以上） 新竹市東區 6年工作經驗 140天前更新展開
* DFM rule creation based on layout environment for process weakness * DTCO for PPA enhancement * Testline creation for process and device monitor
- 面議（經常性薪資達4萬元或以上） 新竹市東區 2年工作經驗 140天前更新展開
Constraint 流程設計, 與軟體廠商, 內部設計自動化團隊, IC design 團隊合作並設計timing constraint和netlist data-in 的自動化流程. . 依據IC設計需求, 開發並維護相關 components and scripts. . 協助支援 design teams on flow infrastructures, SDC/Netlist sanity and consistency verification, related tools, and flows. . 新功能的研究開發來改善IC設計流程的效率以及品質.
- 面議（經常性薪資達4萬元或以上） 新竹市東區 4年工作經驗 140天前更新展開
1. DFT architecture exploration & evaluation for next-gen process node & package technology of MediaTek: * Scan chain insertion & ATPG pattern generation * Pattern validation through simulation & silicon analysis(pass/fail, shmoo, fail log, etc.) * Diagnosis to help manufacture process improvement 2. Co-work with SoC architect, RTL designer, physical design engineer, and package engineer to define best architecture for 3D-IC: * PPA(Performance/Power/Area) impact analysis & mitigation via DFT innovation * Develop & integrate DFT-related RTL design modules to test chip
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