- 面議（經常性薪資達4萬元或以上） 新竹市東區 4年工作經驗 今天剛更新展開
* 資深SI/PI工程師 * 封裝/電路板 SI/PI設計與晶片開發於消費型產品, 車用以及企業級高效運算產品 * 記憶體以及高速Serdes SI/PI設計 * 高效能CPU/GPU/APU PI以及PDN設計 * 建立封裝/電路板的高速序號設計準則, PDN電氣規格, 以利產品進行
- 面議（經常性薪資達4萬元或以上） 新竹市東區 6年工作經驗 今天剛更新展開
1. 應用於I/O 小晶片的 SerDes 設計驗證工作. 包含從原型測試到量產晶片, 並與類比, 數位和演算法設計團隊合作. 2. 負責實現 SerDes 韌體設計, 以驗證連線效能和實現量產測試 3. 負責建立自動測試和資料分析, 以測試SerDes的晶片特性和分析失效晶片
- 面議（經常性薪資達4萬元或以上） 新竹縣竹北市 2年工作經驗 今天剛更新展開
1. 負責高速 Serdes相關開發, 包含驗證, 客戶支援 (熟悉架構, 韌體、除錯、優化及測試等工作項目) 2. 開發測試自動化 3. 協同團隊共同完成系統雛型建立及性能優化與調適 4. 達成客戶端產品導入，並支援產品量產
- 面議（經常性薪資達4萬元或以上） 新竹市東區 8年工作經驗 今天剛更新展開
We are looking for a highly experienced PISI Technical Leader to join our team. The ideal candidate will have extensive experience in Power Integrity and Signal Integrity, with a strong background in high-speed IO interface simulations and PDN analysis. As a PISI Technical Leader, you will guide customers through Signal Integrity and Power Integrity signoff, model and optimize system components, and collaborate with various teams to ensure optimal package, PCB, die, interposer, and substrate designs. 1. Guide customers to complete Signal Integrity and Power Integrity signoff. 2. Model and optimize vias, connectors, sockets, breakouts, and various system components using commercial tools. 3. Perform system-level signal integrity simulation in high-speed IOs such as PCIe, SerDes 4. Architect and simulate power delivery systems, including multiple dies, substrate, interposer, PCBs, and on-die PDN models. 5. Collaborate with multiple teams, including layout, design, and customers, to optimize package, PCB, die, interposer, and substrate designs.
- 面議（經常性薪資達4萬元或以上） 新竹市東區 6年工作經驗 今天剛更新展開
The Senior Power Integrity Engineer is responsible for the design and analysis of Power Delivery Networks (PDNs), encompassing voltage regulators, PCBs, substrates, and silicon dies, to drive strategic technology development for data center SoCs. Key responsibilities include conducting power integrity pathfinding, developing both detailed and reduced-order PDN models, and optimizing PDN performance through comprehensive time-domain and frequency-domain analysis. This role requires proficiency in scripting and design automation, as well as expertise in analytical methods and commercial simulation tools (e.g., 2.5D EM solvers) to extract PCB and package impedance profiles and generate accurate N-port models.
- 面議（經常性薪資達4萬元或以上） 新竹市東區 工作經歷不拘 今天剛更新展開
• Design, simulate and test various building blocks for photonic ICs such as modulators, filters, and detectors. • Develop mathematical models of photonic components for co-simulation with electronic circuits. • Contribute to the integration and testing of Photonic & Electronic ICs, collaborate with cross functional teams to improve system performance and optimize designs. • Must be proficient in programming (e.g. Python or MATLAB) for design automation
- 面議（經常性薪資達4萬元或以上） 新竹市東區 8年工作經驗 今天剛更新展開
The Senior Manufacturing and Test Engineer is responsible for improving manufacturing and test flows to optimize quality, yield and power in AI ASICs. Activities include DFT definition, coverage analysis and test content improvements at socket & system level to drive yield and quality. Collaboration across design and manufacturing teams to correlate pre-silicon to post-silicon through data analysis, building quality models and driving optimizations is expected. Deep understanding and experience in DFT architecture, quality, yield and power measurement flows is needed.
- 面議（經常性薪資達4萬元或以上） 新竹市東區 5年工作經驗 今天剛更新展開
1.Telematics product market analysis and strategy planning 2.Telematics product competition analysis and roadmap planning 3.Product promotion: Go to market promotion for OEM/Tier1/Tier2 customers and new product launch promotion Deliverables: Create and maintain market models, account customer product line management, conduct product competition analysis , Provide strategic recommendations for long-term product roadmap planning
- 面議（經常性薪資達4萬元或以上） 新竹市東區 3年工作經驗 今天剛更新展開
1.PCB power related hardware design：Resonsible for design and develop hardware including circuit design, component evaluation and selection, customized component planning, layout review, etc. 2. System specification and design requirement collection. 3. System hardware verification and testing: function verification and power quality measurement. 4. Cross-organizational collaboration: Collaborate with IC design team, system team, SI/PI team, layout team, etc. to complete system design, production and verification. 5. Customer and related manufacturer support: including technical document writing, customer reference design support, on site support, etc.
- 面議（經常性薪資達4萬元或以上） 新竹縣竹北市 6年工作經驗 今天剛更新展開
1. SIP Module Business model & Technology Roadmap Planning 2. SIP (System in Package) Module strategy, state of Art technology to realize complex SIP module with complex SOC, PMIC, Memory within the SIP module. 3. Establish an echo system partners from technology Partners as Memory, Power Management and also Industrialization partners who support latest package & manufacture technology to realize SIP module robust, compatible and commercially competitive. 4. Well define SIP product specification and process. 5. Support OEM & Tier 1 customers‘ integration concept. 6. Identify value added for our products, from technology and also system level commercial aspect
- 面議（經常性薪資達4萬元或以上） 新竹市東區 8年工作經驗 今天剛更新展開
1. IC封裝/晶圓凸塊技術開發與管理 2. 與封裝廠合作完成規劃之技術開發 3. 先進封裝技術開發,品質驗證與生產良率管理 4. 定期與不定期執行bumping/fan-out/WLCSP廠品質稽核
- 面議（經常性薪資達4萬元或以上） 新竹市東區 2年工作經驗 今天剛更新展開
1. Develop and implement DRAM controller/PHY solutions for data-center applications. Validate functionality, improve design to optimize performance, power, latency and efficiency. 2. Memory controller/PHY Integration: Design and integration memory system.
- 月薪40600~47000元 桃園市中壢區 工作經歷不拘 今天剛更新展開
機械/水處理作業、電力/消防/自動控制/冷凍空調作業、工程設計/發包作業、產線自動化規劃與執行、專案規劃與推動。
三節獎金員工團保員工宿舍員工餐廳產假 -
