• 月薪42000~43500元 桃園市桃園區 2年工作經驗 今天剛更新
    1.負責預算財報編審與控管 2.負責每月財務月報表製作與公布 3.負責廠商每月請款、匯款作業 4.執行社區事務及公設各項收支管理,管理費繳費單印製 5.整理簽核文件及發送,並負責追蹤執行狀況,隨時掌控進度 6.社區財務報表制作與零用金管理 7.會計核算和帳務處理 8.負責管理費收繳與催收作業 9.負責管理中心文件表單之歸檔及保存 10.負責協助支援櫃台 11.負責吧檯營收結算作業 12.負責整理簽核文件及發送,並負責追蹤執行狀況,隨時掌控進度
    展開
    年節獎金員工生日禮金三節獎金禮品激勵獎金
  • 面議(經常性薪資達4萬元或以上) 新竹市東區 工作經歷不拘 今天剛更新
    職位與職責: 1. 定義 GPU 編譯器軟體架構及介面。 2. 開發/實作 GPU 編譯器流水線、連結以及各種最佳化/轉換。 3. 與驅動程式團隊及硬體團隊合作,實作新的 API 與硬體功能。 4. 與驅動程式團隊及硬體團隊合作,改善/調整效能與功耗。 5. 執行並交付專案,以達成里程碑與進度要求。 6. 分析並除錯程式碼生成相關問題。 7. 分析並影響未來 GPU 架構的設計。 8. 與內部及外部團隊建立可靠且值得信賴的合作關係。
    展開
  • 面議(經常性薪資達4萬元或以上) 新竹市東區 工作經歷不拘 今天剛更新
    We are looking for talented engineers to join our GPU Architecture team. In this role, you will be at the forefront of defining the next generation of mobile high-performance GPUs. You will be responsible for developing a C++ based model, which serves as the primary tool for architectural exploration, bottleneck analysis, and performance projection before silicon availability. Whether you are a fresh graduate with a strong passion for computer architecture or a seasoned veteran in performance modeling, we invite you to help us push the boundaries of graphics rendering and compute efficiency.
    展開
  • 面議(經常性薪資達4萬元或以上) 新竹市東區 5年工作經驗 今天剛更新
    Role and Responsibilities • Responsible for GPU cluster uArch specification, PPA (power, performance and area) optimization for industry-leading GPU hardware IP • Collaborate with Arch/Model/SW team, develop cluster level HW specification that meets feature functionality and PPA metrics • Collaborate with Arch/SW/Design team to identify and solve performance bottlenecks, power/area inefficiency issues • Guide IP design process all the way from RTL coding, verification to tape out and post-silicon debug • Proficiently use AI agent and tools to improve RTL coding, function debug and PPA analysis productivity • Execute & deliver to meet milestones/schedules. • Analyze and debug code pre-silicon and post-silicon issues. • Analyze and influence future GPU architectures. • Construct reliable & trustable relationships across teams internally & externally. • Delivering best in class GPU IP for mobile, automotive, laptop and ASIC applications
    展開
  • 月薪45000~55000元 台中市西屯區 2年工作經驗 今天剛更新
    1. 協助公司品質管理系統之推動、維護及持續改善。 2. 主導推行並維護下列管理系統:   - ISO 9001 品質管理系統   - ISO 45001 職業安全衛生管理系統 3. 協助客戶品質問卷、稽核資料及相關文件之整理與回覆。 4. 協助品質目標追蹤及改善措施執行。 5. 協助環安衛相關制度及法規事項之管理。 6. 配合主管推動公司品質、職安及永續發展相關專案。 7. 規劃與執行教育訓練,提升同仁品質與安全意識。 8. 其他主管交辦事項。
    展開
    產假年終獎金三節獎金員工結婚補助生育補助
  • 面議(經常性薪資達4萬元或以上) 新竹市東區 5年工作經驗 今天剛更新
    Role and Responsibilities • Responsible for GPU cluster uArch specification, PPA (power, performance and area) optimization for industry-leading GPU hardware IP • Collaborate with Arch/Model/SW team, develop cluster level HW specification that meets feature functionality and PPA metrics • Collaborate with Arch/SW/Design team to identify and solve performance bottlenecks, power/area inefficiency issues • Guide IP design process all the way from RTL coding, verification to tape out and post-silicon debug • Proficiently use AI agent and tools to improve RTL coding, function debug and PPA analysis productivity • Execute & deliver to meet milestones/schedules. • Analyze and debug code pre-silicon and post-silicon issues. • Analyze and influence future GPU architectures. • Construct reliable & trustable relationships across teams internally & externally. • Delivering best in class GPU IP for mobile, automotive, laptop and ASIC applications
    展開
  • 面議(經常性薪資達4萬元或以上) 新竹市東區 5年工作經驗 今天剛更新
    Role and Responsibilities • Responsible for GPU cluster uArch specification, PPA (power, performance and area) optimization for industry-leading GPU hardware IP • Collaborate with Arch/Model/SW team, develop cluster level HW specification that meets feature functionality and PPA metrics • Collaborate with Arch/SW/Design team to identify and solve performance bottlenecks, power/area inefficiency issues • Guide IP design process all the way from RTL coding, verification to tape out and post-silicon debug • Proficiently use AI agent and tools to improve RTL coding, function debug and PPA analysis productivity • Execute & deliver to meet milestones/schedules. • Analyze and debug code pre-silicon and post-silicon issues. • Analyze and influence future GPU architectures. • Construct reliable & trustable relationships across teams internally & externally. • Delivering best in class GPU IP for mobile, automotive, laptop and ASIC applications
    展開
  • 面議(經常性薪資達4萬元或以上) 高雄市梓官區 工作經歷不拘 今天剛更新
    1. 作業現場架設警示標語與設置安全圍欄,確保現場人員與設備安全。 2. 依照操作規範操作堆高機進行貨物裝卸、堆放及運輸作業。 3. 定期執行堆高機機具的日常保養和檢查維修計畫,保持設備正常運行。 4. 針對機具的零件與耗材進行除鏽、上油、防護及定期清潔作業。 5. 協助檢查貨物包裝完整性與正確性,確保物品於搬運中完好無損。 6. 聽從現場主管的指揮,並遵循所有的安全作業規範及SOP指導。 ********需配合加班 無法加班者請勿應徵********
    展開
    產假產檢假全勤獎金年節獎金員工生日禮金
  • 面議(經常性薪資達4萬元或以上) 新竹市東區 工作經歷不拘 今天剛更新
    Role and Responsibilities • Collaborate with architects and design leads to define and document micro architecture of sub-modules of shader subsystem • RTL coding and deliver high quality scalable design to meet PPA requirements • Collaborate with verification team for feature description, testplan, and coverage closure • Assist DV engineers for debugging functional, performance, power test failures • Collaborate with synthesis and PD team for timing and area closure • Collaborate with power team to identify power saving opportunities and meet power target • Assist block team manager in strategy, planning, scope estimation, and progress reporting
    展開
  • 面議(經常性薪資達4萬元或以上) 新竹市東區 2年工作經驗 今天剛更新
    About the Role: Bring your GPU driver expertise and work closely with our Architecture and Micro-architecture teams. In this role, you will contribute across the GPU software stack and help extract maximum performance from the silicon while supporting the development of our next-generation GPU designs. This is not a siloed driver role. You will have opportunities to work across industry-standard graphics and compute APIs, kernel-mode drivers, GPU firmware, performance optimization, and hardware/software integration. What You‘ll Do — The Full Stack: • API Layer: Develop, debug, and optimize features for industry-standard APIs including Vulkan, DirectX, OpenGL ES, and OpenCL. • Kernel & Firmware: Work on kernel-mode drivers and GPU firmware to improve hardware control, stability, scheduling, memory management, and execution efficiency. • Performance: Analyze and optimize bottlenecks across the stack, including driver overhead, memory bandwidth, GPU scheduling, compute throughput, and power/performance tradeoffs. • Cross-Team Collaboration: Work closely with Architecture, Micro-architecture, Compiler, and GPU Model teams to validate GPU behavior, debug complex issues, and improve software/hardware interaction. • System-Level Debugging: Investigate issues across user-mode drivers, kernel-mode drivers, firmware, and hardware models to improve stability, correctness, and performance. Why This Role? • No Silos: You are not restricted to only one layer of the stack. You will have the opportunity to work across APIs, drivers, firmware, and performance. • Hardware-Software Impact: Your work will help the software stack fully utilize GPU hardware capabilities. • Next-Gen GPU Exposure: You will collaborate with architecture, compiler, and modeling teams on technologies that shape future GPU products. Ready to work across the entire GPU stack? Apply today.
    展開
  • 面議(經常性薪資達4萬元或以上) 新竹市東區 工作經歷不拘 今天剛更新
    - Collaborate with architects and cross-functional teams to understand GPU specs and define verification strategies. - Develop SystemVerilog/UVM test frameworks and co-simulation environments; verify GPU logic at unit, subsystem, and top levels. - Create and execute verification test plans, focusing on functional coverage. - Generate random and directed test sequences; maintain testbench, scoreboard, BFMs, and regression. - Perform RTL and coverage analysis; optimize test scenarios and address bug escapes. - Support performance verification, emulation, data collection, debugging, and PPA improvements. - Conduct formal verification.
    展開
  • 面議(經常性薪資達4萬元或以上) 新竹市東區 工作經歷不拘 今天剛更新
    1. SOC platform 架構與RTL implementation 2. 負責 IP/子模組之 RTL 整合,組成 SoC (System-on-Chip) 或子系統的頂層設計。 3. 依據設計規格,串接不同來源或平台的 RTL,確保各模組間介面相容與功能正確。 4. 撰寫與維護整合 RTL 的頂層模組、配置腳本及連結測試環境。 5. 針對整合後的設計進行功能模擬、靜態時序分析(STA)、Lint、CDC 及等驗證工作,並協助 debug。 6. 與軟硬體、驗證、後端設計等團隊密切合作,確保整合流程順利與產品交付時程。 7. 編寫設計文件及協助設計交付相關事務。
    展開
  • 面議(經常性薪資達4萬元或以上) 新竹市東區 4年工作經驗 今天剛更新
    加入 MediaTek「先進製程平台 DFT」團隊,你的工作直接影響 N4/N3/N2 及更先進世代 Cloud ASIC 的可靠度與良率。 - DFT 架構與插入:針對先進節點 SoC 及 chiplet/3D-IC 設計,定義並實作 Scan(full-scan、compressor)、MBIST、BSD/JTAG 架構;使用 Synopsys / Siemens (Tessent) EDA 工具執行端到端插入流程。 - ATPG 與 Advanced Fault Model:開發並優化 stuck-at、transition delay、cell-aware、path-delay 等 fault model 的 ATPG pattern;驅動 fault coverage closure 並交付 DRC-clean pattern。 - 模擬與驗證:透過 gate-level simulation(VCS/Xcelium)驗證 DFT 邏輯正確性;解決 DFT rule violation 與 coverage gap,確保 tapeout 品質。 - 後矽驗證與測試:主導 CP / FT / HTOL / HVS 各階段 DFT 工作,包含 test mode 驗證、scan chain 連通性測試、MBIST 執行與 repair 確認。 - Volume Diagnosis 與 Yield Ramp:運用 scan/MBIST diagnosis 資料分離系統性缺陷,與製程及 FA 團隊協作加速 yield learning 與技術成熟。 - RMA / DPPM 除錯:利用 DFT diagnosis 流程調查 field return,協助降低 DPPM 並防止 escape。 - 產業前沿:持續追蹤 Cloud ASIC chiplet 測試趨勢、ATE 技術進展與 EDA 新功能,主動將新觀念帶入團隊。 職務要求
    展開
  • 面議(經常性薪資達4萬元或以上) 新竹市東區 工作經歷不拘 今天剛更新
    Responsible for GPU HW development environment tool/flow maintenance and database (perforce) management. Effectively support DE/DV smooth development.
    展開
  • 無經驗也能轉職成功,高雄台南+月薪三萬工作機會