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職缺名稱公司名稱上班地點工作經驗更新薪資待遇
- 面議（經常性薪資達4萬元或以上） 新竹縣竹北市 工作經歷不拘 今天剛更新展開
1. WiFi/BT/UWB 公板設計及驗證 2. PCB 公版設計, 除錯, 驗證 3. FCC/CE/TELEC EMI 防治對策 4. 支持客戶應用及量產導入
- 面議（經常性薪資達4萬元或以上） 新竹縣竹北市 工作經歷不拘 今天剛更新展開
1.WiFi/BT Reference board design, system integration and verification. 2.Capability for PCB circuit layout/debug/develop. 3. Dealing with EMI issues 4. Dealing with high-speed digital interface issue
- 面議（經常性薪資達4萬元或以上） 新竹市東區 10年工作經驗 今天剛更新展開
Senior Technical Program Leader | USB3/USB4 Customer Issue Resolution
- 面議（經常性薪資達4萬元或以上） 新竹市東區 4年工作經驗 今天剛更新展開
1 Develop the Timing/EM signoff criterion for leading process node and 3DIC. 2 Maintain the Timing/EM Signoff criterion ,provide issue solving and consultant for projects on abnormal/unfixable timing/EM violation 3 Develop new Timing/EM signoff methodology to be applied during chip synthesis/APR/STA/EM . 4 SPICE correlation for new timing/EM signoff criterion 5 Regression test for every signoff methodology by STA violation/slack analysis, EM results 6 Post-silicon data analysis for silicon-proven timing/EM signoff criterion
- 面議（經常性薪資達4萬元或以上） 桃園市龍潭區 3年工作經驗 今天剛更新展開
1. 原料、費用、包材供應商採購相關工作執行、詢比議價、交期追蹤 2. 供應商管理包含供應商建檔、文件索取交期跟催、風險管控 3. 進口帳款處理、驗收跟催及財會請款作業 4. 其他主管交辦事項
員工在職教育訓練員工生日禮金年終獎金三節獎金禮品 - 面議（經常性薪資達4萬元或以上） 新竹縣竹北市 工作經歷不拘 今天剛更新展開
Summary Join our Virtual Development Kit (VDK) team to build high-performance SystemC/TLM virtual platforms that enable software development and integration before hardware is available. You will develop functional IP models, integrate them into a bootable virtual SoC, and deliver test/automation that makes the platform reliable and scalable for daily software use. Key Responsibilities 1. Develop functional IP models in SystemC/TLM to enable software left-shift 2. Design clean TLM interfaces and connectivity for reusable modeling 3. Integrate IP models into a Virtual SoC (vSOC) and support system bring-up 4. Build platform-level tests and regression to validate correctness 5. Improve productivity with tooling and CI/CD automation
- 面議（經常性薪資達4萬元或以上） 新竹市東區 4年工作經驗 今天剛更新展開
1. Lead or support SoC architecture design, modeling, and technical feasibility studies across specific domains, including cellular modem, connectivity (Wi-Fi/Bluetooth/GNSS/UWB), performance, and power. 2. Lead or support SoC architecture development for smartphone, thin-modem, CPE/telematics, and gateway products, focusing on system performance and power considerations based on product requirements. 3. Lead or support technical feasibility studies of product requirements and collaborate with domain architects and product marketing teams to develop competitive product specifications.
- 面議（經常性薪資達4萬元或以上） 新竹市東區 4年工作經驗 今天剛更新展開
•職場不法侵害與不當行為處理 負責職場不法侵害及不當行為等案件的受理、調查與結案管理，扮演中立客觀的溝通窗口，確保調查程序公正與保密。與法務、HR、管理層及外部專業顧問協作，並協助制定及優化相關政策與流程。 •心理風險與職場健康治理 具備敏銳度與關懷特質，能辨識壓力、心理、與衝突風險，提供初步心理支持及轉介，推動職場健康與尊重文化專案。 •職場不法侵害預防與年度風險評估 規劃並執行年度職場不法侵害預防計畫，提出風險與改善建議，並擔任外部稽核、勞檢審查之主要窗口。 •教育訓練與組織賦能 規劃並推動主管、HR及一般員工的防治與應對訓練，協助建立早期預防機制，並完善通報和介入機制，降低申訴及法律風險。
- 面議（經常性薪資達4萬元或以上） 新竹市東區 4年工作經驗 今天剛更新展開
1.Lead the development and enhancement of RC extraction flow for advanced physical designs 2.Drive RC extraction flow development for heterogeneous integration technologies, including CPO and 3DIC 3.Collaborate with EDA vendors to advance RC extraction methodologies 4.Perform FOM RC analysis to identify and propose DTCO opportunities
- 面議（經常性薪資達4萬元或以上） 新竹市東區 工作經歷不拘 今天剛更新展開
Multi-RAT (6G/5G/4G/3G/2G) modem development. This is a common job description. You may involve at least one or more topics in the following: (1) architecture planning 1.1 Modem/SoC TOP system architecture 1.2 Modem/SoC CPU system design 1.3 Modem/SoC DSP system design 1.4 Modem/SoC BUS system design (2) digital circuit design and verification 2.1 baseband modules 2.2 digital front-end modules 2.3 RF/mixed-mode digital control modules 2.4 Computer/network system modules 2.5 High speed interface design (3) IP integration 3.1 Clock/reset, test modeand low power mode design 3.2 floorplan and synthesis development (4) Design methodology 4.1 design flow enhancement (low power/verification/etc) 4.2 chip MP quality control flow
- 面議（經常性薪資達4萬元或以上） 新竹市東區 2年工作經驗 今天剛更新展開
1. Processor micro-architecture design 2. Cache and bus interface 3. DSP and machine learning library design 4. Simulator/modeling and architecture
- 面議（經常性薪資達4萬元或以上） 新竹市東區 8年工作經驗 今天剛更新展開
Job Description: (1) Sourcing for IC backend(assembly & testing) : Cost management and logistics control, optimizing the outsourcing strategy between cost and supply for constant operation requirement. (2) Building up working model of a new project‘s capacity/cost with effective plan (3) Regular meeting with OSATs and keep strategic relationship on constant production support and long-term cooperation (4) Monitor market trend and study valuable source for next-step of OSAT requirement on cost and technical development. (1) IC 後段封裝測試採購 : IC 後段成本管理與運籌布局，對公司持續營運維護最佳化的成本與產能策略。 (2) 建立專案產能與成本評估模式 (3) 常規會議與封測廠維持產能支援與長期合作的策略關係 (4) 監督市場走向並研究對成本優化與技術發展具價值的產能來源
- 面議（經常性薪資達4萬元或以上） 新竹市東區 工作經歷不拘 今天剛更新展開
1.RTL platform design integration (clock/reset/power/bus design and architecture, MBIST, etc.) - use for FPGA and Emulator should also be considered 2.Integration quality check (RTL/SDC/Power spec signoff check)
- 面議（經常性薪資達4萬元或以上） 新竹市東區 工作經歷不拘 今天剛更新展開
1.Propose design verification plan and do the execution based on IP and system HW architecture/application 2.Develop design verification environment 3.Develop required verification methodology and adopt into project 4.Develop HW emulator/FPGA platform to accelerate design verification task 5.Co-work with SW/HW engineering to valid function and shift-left SW develop 6.Debug and root cause failure with SW/HW engineering in both pre-silicon and post-silicon
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